SU1131034A2 - Digital non-coherent discriminator of pseudorandom radio signal delay - Google Patents

Abstract

DIGITAL INCORPORATED DISCRIMINATOR FOR DELAYS OF THE PEDIATRESS RADIO SIGNAL 72667B characterized in that, in order to increase accuracy by eliminating failures in the discriminator when the counting pulses coincide with the moments of the phase change of the input signal, an additional delay block, a controlled switch and a series-connected phase-shifting block and a timed trigger are inserted, the third reversing inputs the counters are connected to the output of the second pulse generator via a controlled switch to the other inputs of which the output of the second pulse generator is connected, respectively through the additional delay unit, direct and inverse outputs of the triggered trigger, the first input of the phase-shifting unit is connected to the input of the reference frequency of the second pulse driver, the second input 9 is combined with the input of the driver of the input signal, and the inverse output of a timed trigger is connected to another input clocked trigger.

Description

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About the invention The invention relates to communication technology and can be used in communication systems and pseudorandom control systems. According to the main auth. No. 726671 is a digital non-coherent pseudo-random radio signal delay distributor, containing the first and second multipliers combined at the input, the output of each of which is connected through a series-connected reversing counter and a strobe unit to the corresponding input of the deactivating unit, as well as the reference generator, the outputs of which are connected to other inputs the first and second multipliers, the shaper input signal, the delay unit and two pulse shaper, and the output shaper input signal The ala is connected to the inputs of the first and second multipliers, the additional output of the reference generator is connected through the series-connected first pulse generator and the delay unit is connected to the second inputs of reversible meters, the third inputs of which are connected to the output of the second pulse former, whose input is combined with the input of the reference generator, and the output of the first formative pulse is connected to the other inputs of the gating blocks Li. However, the known digital incoherent discriminator of the delay has insufficient stability and accuracy, because, due to the randomness of the initial phase of the input signal, ambiguity arises in the bills, which leads to the work of the discriminator when the counting pulses coincide with the instants of the phase change of the input clipped signal. The purpose of the invention is to improve the accuracy by eliminating failures in the discriminator when the counting pulses coincide with the moments of the phase change of the input signal. In the digital incoherent discriminator, the pseudo-random radio signal delay containing the first and second multipliers, each of which through a series-connected reversible counter. and a gating unit is connected to the corresponding input of the subtracting unit, as well as a reference generator, the outputs of which are Connected to other inputs of the first and second multipliers, the input driver, delay unit and two pulse drivers, the output of the input driver connected to the inputs of the first and second multipliers, the auxiliary output of the reference generator through the serially connected first pulse driver and the delay unit connected to the second inputs reversible counters, the third inputs of which are connected to the output of the second pulse generator, the input of which is combined with the input of the reference generator , and the output of the first pulse shaper is connected to the other inputs of the gating blocks, an additional delay block, a controlled switch, and a series-connected phase-shifting block and are introduced. clocked trigger, while the third reversible counter inputs are connected to the output of the second form -: -, the pulse bodies through a controlled switch, to the other inputs of which the output of the second pulse former is connected via an additional block of delay, the clock trigger, and the first input of the phase-shifting unit is connected to the input of the reference frequency of the second pulse driver, the second input is combined with the input of the input signal shaper, and the inverse code of the third signal the wizard is connected to another input of the interpreted trigger. The drawing shows a structural electrical circuit of the proposed digital non-coherent discriminator of a pseudo-random radio signal delay. Digital non-coherent discriminator of pseudo-random radio signal delay contains input signal driver t, first and second multipliers 2 and 3, reversible counters 4 and 5, sampling blocks 6 and 7, subtractive block 8, delay block 9, drivers 10 and 11 sh pulses, reference generator 12 consisting of two frequency dividers 13 and 14, the third and fourth multipliers 15 and 16, the feedback shift register 17 and the E 18, and the phase shifting unit 19, clocked trigger 20, controlled switch 21, keys 22 and 23 and eleme This or 24 and an additional delay unit 25.

Digital incoherent discriminator works as follows.

The input is a “pseudo-random radio signal, represented by a harmonic oscillation, manipulated in phase by a binary pseudo-random sequence (PSP). This signal passes through the shaper 1 input signal, which can be executed, for example, in the form of a hard limiter. The signal formed at the same time, called klilopirovanny, goes to the first inputs of the first and second multipliers 2 and 3, respectively. The other inputs of the first and second multipliers 2 and 3 are supplied with a reference clipped signal obtained by multiplying the reference sequences of the lag and advance channels supplied to the first turns of the third and fourth multipliers 15 and 16, to the second inputs of which the reference frequency from the frequency divider 13 arrives. This square wave is formed by dividing the frequency of the reference clock signal supplied to the input and having the form of a square wave, a frequency divider 13. In this example, the frequency of the reference signal f. 4F and the frequency divider 13 have a division factor of N1 2, with the result that the frequency of the reference meander p | 2F. The outputs of the third and fourth multipliers 15 and 16 are Sob clipped radio reference signals. After multiplying in the first and second multipliers 2 and 3 the clipped input pseudo-random radio signal with the reference clipped pseudo-random radio signals of the lagging and advancing channels coming from the third and fourth multipliers 15 and 16, respectively, two signals are received, which are sent to the control signals, which are passed to the control signals and received by the control panel and the fourth multiplier 15 and 16 respectively the inputs of the reversible counters 4 and 5, respectively. These signals serve to control the counting direction of the counting pulses applied to the counting inputs of the reversing counters 4 and 5. The counting pulses are formed from a reference clock signal that passes through the pulse driver 11. In the pulse shaper 11, short counting pulses are formed: s from the reference clock signal, so that the frequency of the counting pulses is cu

In the reverse meters 4 and 5, the accumulation of counting pulses from the imaging unit 11 is produced during the reference memory bandwidth period. The sign of each accumulated counting pulse is determined by the polarity of the direction supplied to the control input of the reversible counter 4 or 5. At the end of the SRP period, the numbers in the reversible counters 4 and 5 will be accumulated.

At the end of the period, the SRP contains units in all bits of the shift register 17 with feedback, resulting in a zero voltage at the output of the And 18 element. At the time of the occurrence of this voltage, the pulse shaper 10 emits a pulse arriving at the control inputs (open inputs) of the gates 6 and 7, which pass the contents of the reversing counters 4 and 5 to the addition and subtraction inputs of the subtractor 8, respectively. It is significant that from the reversible counters 4 and-5, the unsigned content, i.e. in subtractive unit 8, the operation of subtracting the modulus of the number stored in the reversible counter 5 is performed from the modulus of the number stored in the reversing counter 4i

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Census and subtraction operations can be performed in parallel or sequential form. After ne rewriting the contents of the reversing counters 4 and 5 into the subtracting unit 8, a short pulse from the delay block 9 is set to the inputs, resetting these reversing counters 4 and 5, which sets the reversing counters 4 and 5 to zero and the whole cycle of the digital incoherent discriminator repeats is happening again. In order to provide an unbiased assessment of the value of the delay formed by the incoherent discriminator, it is necessary to rewrite the contents of the reversible

Counters 4 and 5 and their installation in the zero state were made in a time shorter than the period of the ACCOUNT impulses.

The coincidence of the counting pulses (frequency 4P) with the moment of the phase change of the clipped input signal at the input of the reversing counters 4 and 5 causes an ambiguity or loss of the samples recorded in the reversing counter. Such counts of pulses relative to the input clipped signal correspond to the instant of coincidence of the phases of the input and reference clock signals. In this case, in the phase shifter 19, a pulse is generated corresponding to the instant of coincidence of the phases of the compared signals. This impulse, arriving at the counting input, overlaps the timing trigger 20.

. Let at the initial moment the clocked trigger 20 is in the single state, then the key 22 is open, and the key 23 is closed, and the counting pulses from the driver 11 pulses through the public key 22 and the IL 24 element arrive at the third input of the reversible counters 4 and 5. the next pulse from the output of the phase-shifting unit 19, the clocked trigger 20 switches, the key 22 closes, the key 23 opens, then the third inputs of the reversible counters 4 and 5 receive counting pulses delayed in the additional block 25 Inu equal to r / 2 of the input signal is clipped.

Thus, the introduction of new elements into the digital-incoherent discriminator makes it possible to eliminate failures in the operation of the digital incoherent discriminator due to the coincidence of the temporal position of the counting pulses with the moment of the phase transition of the input signal. As a result, the stability and accuracy of the digital incoherent discriminator increases.

Claims (1)

DIGITAL INCORRECT DISCRIMINATOR OF DELAY OF PSEUDO RANDOM RADIO SIGNAL according to ed. No. 726671, characterized in that, in order to improve accuracy by eliminating malfunctions of the discriminator when the counting pulses coincide with the moments of the input signal phase change, an additional delay unit, a controlled switch and a phase-shifting unit and a phase-locked trigger are connected in series, while the third inputs of the reversible counters are connected to the output of the second pulse shaper through a managed switch to the other inputs of which are connected respectively the output of the second pulse shaper s through an additional delay unit, direct and inverse outputs of the clocked trigger, with the first input of the phase-shifting unit connected to the input of the reference frequency of the second pulse shaper, the second input combined with the input of the input driver, signal, and the inverse output of the clocked trigger connected to another input of the clocked trigger. SU „„ 1131034