SU1087989A1 - Function generator for unit-counting code - Google Patents

Abstract

FUNCTIONAL NUMBER-PULSE CODE CONVERTER, containing two delay elements, two AND elements, OR element, counter, pulse addition decoder and pulse skip decoder, the output of which through the first delay element is connected to the first input of the first element And, the second input of which is connected to the converter input and through the second delay element with the first input of the second element I, the second input of which is connected to the output of the pulse addition decoder, the input of which is connected to the output of the counter and the input of the decoder torus pulse skip, elements and outputs connected to respective inputs of OR element, characterized in that, in order to simplify the transducer output OR element connected to the counter input. g

Description

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The invention relates to computing and can be used in digital, analog-digital and digital-analog computing and measuring devices and a system for reproducing functions that are close to linear in a wide range of arguments, in particular, for correcting nonlinearities of sensors and measuring circuits. A device comprising a counter, an adder, and a memory block is known that provides switching control on the C23 ordinate. A disadvantage of the known devices is the increased memory capacity. The closest in technical essence to the present invention is a device comprising a register, a shift, a group of key circuits, two AND elements, two OR elements, two delay elements, an add decoder and a pulse skip decoder, and two counters. In this case, the outputs of the first and second bits of the shift register through the first element OR are connected to the first input of the first key circuit, and the outputs of the third and subsequent bits to the first inputs of the second and subsequent key circuits, respectively, the key outputs of the old circuits and subsequent in order of decreasing bits from the group of younger bits of the First counter, the overflow output of which is connected to the clocking input of the shift register, the outputs of all the bits of the second counter are connected to the input By adding and skipping pulse decoders, the decoder output of the pulse passes through the first delay element is connected to the first input of the first AND element, the output of the second is connected to the first input of the second OR element, the second input of which is connected to the output of the second AND element, first. the input of which is connected to the output of the pulse addition decoder, and the second input is connected to the output of the second delay element; the input of which is connected to the second input of the first element AND, the counting input of the second counter, and is the input of the converter C23. A disadvantage of the known device is the increased stratification of the structure. The aim of the invention is to simplify the conversion. The goal is achieved by the fact that in the functional converter of the number-pulse code containing two delay elements, two elements AND, element OR, a counter, a pulse addition decoder and a decoder of the pulse skip, the output of which through the first delay element is connected to the first input of the first element And, the second the input of which is connected to the input of the converter and through the second delay element to the first input of the second element I, the second input of which is connected to the output of the pulse addition decoder whose input connects ene yield meter and the input of the decoder passing pulses, the outputs of AND gates are connected to respective inputs of the OR gate, an output of OR connected to the counter input. The drawing shows the block diagram of the functional Converter. The number-pulse COD functional converter contains counter 1, decoders 2 and 3 of the pulse addition and skip, delay elements 4 and 5, elements b and 7 1, element 8 OR, the input of the converter 9. The decoders 2 and 3 of pulse skip and pulse addition are standard incomplete decrypt the number of outputs m for which satisfies the ratio m 2, where n is the number of inputs. In this case takes place, i.e. at some code values, an active signal is output at the input of the decoder, at others, a passive signal. Simplification of the proposed converter in comparison with the known one is achieved by eliminating the shift register, a group of key schemes: the counter and the OR element, and the main difference of the operation algorithm is the first change in the principle of control of the choice of correction points — instead of control on the abscissa, the ordinate control is used. The algorithm of the proposed converter is based on reproducing the linear, argument function with continuous input into it at the arrival rate of the input pulses of the corrective unit corrections of the required sign so that the output function matches the required one with an error not exceeding at any point the range of half the selected discreteness error D & - result. Functional Converter works as follows. In the initial position, the counter 1 is set to the zero state. The number-pulse code of the argument is input 9 and then through the elements of AND 6 and OR 8 is fed to the counting input of counter 1, as long as none of the decoders 2 and 3 of AND 6 is open, and the element 7 is closed. When counter value 1 is set in the code. Corresponding to the first correction point in the upstream part of the deviation curve, the decoder 2 is triggered and element 7 is opened. The input pulse, which has set this code in the counter and delayed by element 7, adds one to the contents of the counter. To provide the necessary temporal resolution, the delay time of the element 7 must exceed the duration of the input pulses. An additional pulse sets in the counter a code at which the enabling signal from the output of the decoder 2 is removed. When choosing the decoder control codes for adding a pulse corresponding to the subsequent correction points, it is necessary to take into account that the counter code after each correction increases in comparison with the argument code by one, i.e. exceeds the given code by the number of correction points passed. The PDU runs the downstream part of the deviation curve whenever counter 1 sets the code corresponding to the next correction point (this code must differ from the argument code by the number of previously added and not yet compensated pulses), the decoder 3 skip impulses are triggered. After a time determined by the delay element 4, which must also slightly exceed the duration of the input pulses, the element 6 closes for the duration of the output pulse of the decoder 3, which must slightly exceed the pulse period of the argument, whereby the next argument pulse to the counter does not pass. In general, the reproducible function may deviate from linear to the end of the range in either direction. Another condition that the functions reproduced by this converter must satisfy is that it is not required (implementations of two or more additions of 1 or gaps of pulses directly following each other. The reason for this restriction is obvious, since with this method of reproducing functions the linear code of the argument cannot be distinguished, it is impossible to distinguish such steps from single steps. In other words, using the proposed converter, monotonic functions f (x) can be reproduced, the first the derivative of which in the whole range satisfies the condition 0.5if (x) i2.

Claims (1)

FUNCTIONAL NUMBER-PULSE CODE CONVERTER containing two delay elements, two AND elements, OR element, counter, pulse add decoder and pulse skip decoder, the output of which through the first delay element 'is connected to the first input of the first element And, the second input of which is connected to the input converter and through the second delay element with the first input of the second element And, the second input of which is connected to the output of the decoder add pulse, the input of which is connected to the output of the counter and the input of the decoder pulse passes, the outputs of the AND elements are connected to the corresponding inputs of the OR element, characterized in that, in order to simplify the converter, the output of the OR element is connected to the counter input. S ω with