SU1083393A1 - Device for receiving and transmitting digital information - Google Patents

Abstract

A DEVICE FOR RECEPTION AND TRANSMISSION OF DISCRETE INFORMATION, containing two registers-formaler, input matching unit, two RS triggers, output matching unit whose output is connected to the first input of the input matching unit, and serially connected clock generator and frequency divider output which is connected to the clock inputs of the register-formers, characterized in that, in order to simplify the device by eliminating the prohibition cascades, the coincidence circuit, the driver of the parallel clock a, a pulse counter and an OR element, whose output is connected to the control input of a frequency divider whose output is connected to the signal input of the pulse counter, and to the reset input of the pulse counter, whose output is connected to the R-inputs of the first and second R5 triggers, are entered into it. , the direct outputs of which are connected to the inputs of the OR element, while the outputs of the first generator register are connected respectively to the 5th input of the first RS trigger and to the first input of the output matching unit, to the second input of which is connected my output of the first RS-flip-flop, the inverse output of which is connected to the second input of the input matching EO WITH WITH CO block, the output of which is connected to the signal input of the second recorder and to the S input of the second R5 trigger. with

Description

The invention relates to communication technology and can be used in automated systems for collecting and processing digital information. A device is known for. signal transmission, containing a master oscillator, a distributor, a false start device, triggers, and the OR element C13. This device does not have an automated 1 receive / transmit mode control. The closest to the present invention is a device for receiving and transmitting discrete information, containing two registers, an input matching unit, a twopS trigger, an output matching cell, the output of which is connected to the first input of the input matching unit, and serially connected clock generator and the frequency divider, the outputs of which are connected to the clock inputs of the registers-drivers 2. A disadvantage of the known device is complexity. The purpose of the invention is to simplify the device by eliminating the prohibition cascades, the coincidence circuit, the driver of the parallel code pulses. The goal is achieved by the fact that the device for receiving and transmitting discrete information contains two registers forming the input matching unit, two RS triggers, the output matching unit whose output is connected to the first input of the input matching unit, and serially connected clock pulse generator and a frequency divider, the output of which is connected to the clock inputs of the registers of the formers, is entered a pulse counter and an OR element, the output of which is connected to the control input of the frequency body, the output of which It is connected to the signal input of the pulse counting input, and to the reset input of the pulse counter, the output of which is connected to the K inputs of the first and second RS triggers, the direct outputs of which are connected to the inputs of the OR element, and the outputs of the first register-form driver are connected respectively, to the S input of the first K5-trigger 1 a and to the first input of the output, matching the unit, to the second input of which the direct output of the first | JS-trig- is connected. gera, the inverse output of which is connected to the second input of the input glass of this unit, the output of which is connected to, is connected to the signal input of the second register-raiser and to the S input of the second RS trigger. Fig. 1 shows a structural electrical circuit of the proposed device; in fig. 2 - “stress diagrams, as explained in his work. A device for receiving and transmitting discrete information contains a generator of 1 clock pulses, a divider 2 frequencies, the first 3 and second 4 registers-formers, a pulse counter 5, the first 6 and second 7 RS triggers, the output matching of block 8, the OR element 9, the input matching block 1Q. The device works as follows. In the initial state, the device is in Receive mode. At the same time, at the output of the element OR 9 and the direct output of the first RS trigger 6, low voltage levels, blocking the operation of divider 2 frequencies, counter 5 and the output matching unit 8, and on the inverse output of the first RS trigger 6, a high voltage level , allowing the passage of information pulses from the communication channel through the input matching unit 10 to 5 - the input of the second RS trigger 7 and the information input of the second register-former 4. The first information pulse (Fig. 2) overturns the second RS -trigger 7, on in The output of which, and consequently, at the output of the element OR 9, a high voltage level is established (Fig. 29), allowing the counter 5 pulses and frequency separator 2 from the generator 1 to operate. 1. tact. in his impulse. The pulses from the output of the divider 2 frequency (Fig. 2 R) are fed to the input of the counter 5 pulses and to the clock input of the second recorder 4, carried out the recording of information. At the end of the filling of the second register-former 4, a pulse appears at the output of the pulse counter 5 (Fig. 2d), which returns the second 1-trigger 7,

and therefore, the device is in its original state ..

When transmitting to the first register-formatter 3, information is recorded, as a result of which the output of the control-5th bit of the first register-former 3 appears a pulse (Figure 24), tipping the first R5-trigger 6, at the direct output which establishes a high level of voltage 10 | (Fig. 2e), which opens the output matching unit 8 and through the element OR 9 enables the operation of the counter 5 and the divider 2 frequencies. The low voltage level of the inverse of the output 15 of the first RS trigger 6 closes the input, matching unit 10, by transmitting information.

The pulses from the output of the divider 2. frequency (Fig. 2 g) are fed to the counter 20

5 and to the clock input of the first register-forming body 3, having carried out the information recorded in it (FIG. 2h) which through the output matching roll 8 enters the communication channel. After the output of counter 5, an impulse appears (Fig. 2i), which, op. castling first R% -trigger 6, who-; rotates the device to its original state.

The proposed device differs from the prototype by the simplicity of the technical solution and algorithm, ensuring its use in automated systems for collecting and processing information, and can be implemented on unified elements of digital technology, which allows, by eliminating a number of blocks, to significantly simplify the device.

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Claims (1)

DEVICE FOR RECEIVING AND TRANSMISSION OF DISCRETE INFORMATION, containing two register-shapers,, input matching unit, two RS-trigger, output matching unit., The output of which is connected to the first input of the input matching unit, and series-connected clock generator and frequency divider, the output of which is connected to the clock inputs of the register-shapers, characterized in that, in order to simplify the device by eliminating prohibition cascades, coincidence circuit, pulse shaper of a parallel code, a pulse counter and an OR element are introduced into it, the output of which is connected to the control input of the frequency divider, the output of which is connected nen with the signal input of the pulse counter, and to the discharge input of the pulse counter, the output of which is connected to the R-inputs of the first and second RS-triggers, the direct outputs of which are connected to the inputs of the OR element, while the outputs of the first register-former are connected respectively to the 5-input the first RS-trigger and to the first input of the output matching block, the second output of which is connected to the direct output of the first RS-trigger, the inverse output of which is connected to the second input of the input matching block, the output of which is connected to the signal the second input of the second recorder and the S-input of the second RS-trigger. 10,83393.