SU1070535A1 - Two-channel device for interface - Google Patents

Abstract

1. A TWO-CHANNEL DEVICE FOR PAIRING, containing in each channel an information input unit, the first output of which is connected to the first input of the distributor, the first output of which is connected to the first input of the information input unit, the second input and output of which are connected to the first j the register, whose output is € 1Dined through the first memory with the input of the SECOND register and the second input of the distributor, the second, third and fourth outputs of which are connected to the inputs of the first register, respectively, the first memory and the second register, the output of which is connected to the third input of the information input unit, and the first input of the information output unit, the second input and the first output of which are connected respectively to the second input and output of the channel, the second output of the information output unit is connected to the third input of the distributor , the fifth output of which is connected to the third input of the information output unit, the sixth and seventh outputs of the distributor of one channel are connected respectively to the fourth and fifth inputs of the distributor of another channel, different Essentially, in order to increase the utilization rate of the equipment, an exchange direction driver was inserted into it, and two switches and a second memory were inserted into each channel, the third outputs of the information input and output blocks were connected to the first and second inputs of the second memory, the first the output of which is connected to the first input of the first switch, the output of which is connected to the input of the first register, the fourth outputs of the input and output blocks of information and the eighth output of the distributor through the second switch 4, connected to the second input the first switch of its channel and with the third input of the first switch of another channel, the ninth output of the distributor is connected to the third input in the memory of the memory, the fourth, fifth and sixth inputs of the second slot are connected to the second, third and the fourth,, second outputs of the second memory of the other; the channel, the fifth outputs of the second memory of both channels are connected to the first and second inputs of the FOE, the exchange directions, the first and the second outputs. to the third and fourth inputs of which are connected respectively to the fourth S4 inputs and the fifth outputs of the input blocks of the first and second channel signals, respectively, the fourth inputs.,: The fifth and fifth outputs of the output modules of both channels are connected respectively to the third and fourth exits and fifth and sixth inlets of the exchange direction generator. 2. The device according to claim 1, wherein the driver of the exchange direction contains elements AND, OR, the first and second inputs of the driver through the first element OR connected to the first inputs of the first four elements AND, the second inputs of which are connected to the third the input of the former, the output of the first element AND is connected to the first outlet of the former, the first inputs of the second and third elements OR and

Description

the fifth element And, the second input of which is connected to the third input of the second, third and fourth elements And, and with the fifth input of the generator, the output of the second element And is connected to the third output of the generator and the second inputs of the second and third elements OR, the outputs of which are connected to the first the inputs of the sixth and seventh And elements, respectively, the output of the third element And connected to the third input of the third element OR and the second output of the imaging unit, the fourth inputs of the third

and the fourth element And are combined with the second input of the sixth element and and connected to the fifth input of the driver, the fifth input of the fourth element, And combined with the second input of the seventh element And and connected to the sixth input of the former, the output of the fourth element And connected to the fourth output of the imaging unit, the outputs of the fifth, the sixth and seventh elements And are connected respectively to the third, second and fourth outputs of the imaging unit.

The invention relates to computing and can be used in the integration of two computers that have different speeds of information exchange.  A device for interfacing two computers is known, comprising first and second counters, random access memory, first and second blocks of OR elements, comparison circuits, first and second blocks of AND elements, operating mode trigger, first and second decoders, first and second AND-NOT elements, two registers and trigger 1 failure.  The disadvantage of this device is the limitation of its functionality, since the device provides only the identification of one of the two computers that went astray or failed.  The closest in technical essence to the present invention is an interface device containing, in each channel, an information input unit, the first output of which is connected to the first input of the information input unit, the second input and output of which are connected to the primary input and output of the channel, respectively, the first - register, the output of which is connected through the first memory with the input of the second register and the second. the input distributes the bodies, the second, third and fourth outputs of which are connected to the inputs of the first register, the first memory and the second register respectively, the output of which is connected to the third input of the information block and the first input of the information output block, the second input and the first output of which are connected with the second input and output of the channel, the second output of the information output unit is connected to the third distributor input, the fifth output of which is connected to the third input of the information output unit, the sixth and seventh outputs of the distributor one This channel is connected to the fourth and fifth inputs of the distributor of the other channel 2, respectively.  A disadvantage of the known device is the low efficiency when aggregating two computers into two channels simultaneously.  The purpose of the invention is to increase equipment utilization.  The goal is achieved by the fact that in a device containing in each channel an information input unit, the first output of which is connected to the first input of the distributor, the first output is connected to the first input of the information input unit, the second input and output of which are connected to the first input and output of the channel, respectively the first register, the output of which is connected through the first memory to the input of the second register and the second input of the distributor, the second, third and fourth outputs of which are connected to the inputs of the first register, respectively, of the first and the second register, the output of which is connected to the third input of the information input unit and the first input of the information output unit, the second input and the first output of which are connected respectively to the second input and output of the channel; the second output of the information output unit is connected to the third distributor input; the fifth output which is connected to the third input of the information output unit, the sixth and seventh outputs of the distributor of one channel are connected respectively to the fourth and fifth inputs of the distributor of another channel, a shaper is introduced directing the exchange, and in each channel two switches and a second mate are entered, the third outputs of the input and output blocks of information are connected to the first and second inputs of the second memory, the first output of which is connected to the first input of the first switch; the output of which is connected to the input of ne the fourth register, the fourth outputs of the input and output information blocks and the second output of the distributor through the second switch are connected to the second input of the first switch of its channel and to the third input of the first switch of another channel, the ninth output of the switch the divider is connected to the third input of the second memory, the fourth to the fifth and sixth inputs of the second one-channel memory are connected to the second, third and fourth outputs of the second memory of the other channel, the fifth outputs of the second memory of both channels are connected to the first and the second inputs of the exchange direction generator, the first and second outputs and the third and fourth inputs of which are connected respectively to the fourth inputs and the fifth outputs of the first and second channel information input blocks, respectively, the fourth inputs and the fifth outputs are block The information output channels of both channels are connected respectively to the third and fourth outputs and the fifth and sixth inputs of the exchange direction generator, the exchange direction generator contains AND, OR elements, and the first and second inputs of the formation body are connected to the first four inputs of the first and second inputs AND elements, the second inputs of which are connected to the third input of the driver, the output of the first element AND is connected to the first output of the driver, the first inputs of the second and third elements OR, and the fifth element AND, second The second input of which is connected to the third input of the second, third and fourth And elements and to the fifth input of the driver, the output of the second element And is connected to the third output of the driver and to the second inputs of the second and third elements OR, the outputs of which are connected to the first inputs of the sixth and the seventh And elements, the output of the third element And is connected to the third input of the third element OR and the second output of the imager, the fourth inputs of the third and fourth elements And are combined with the second input of the sixth element And and the connection The fifth input of the fourth element I is connected to the fifth input of the seventh element I and connected to the sixth input of the former, the output of the fourth element I is connected to the fourth output, the former, the outputs of the fifth, sixth and seventh elements I are connected respectively to the third, second and fourth outputs of the coater.  The drawing shows a block diagram of the device.  The device comprises two channels 1 and an exchange direction driver 2.  Each channel 1 contains serially connected information input block 3, first switch 4, second switch 5, first register b, first memory 7, second register 8 and information output block 9, as well as distributor 10 and second memory 11, with driver 2 the exchange direction contains the first element OR 12, the first, second, third and fourth elements, AND 13-16, respectively, the second and third elements OR 17 and 18, respectively, the fifth, sixth and seventh elements And 19 - 21, respectively; but also inputs - outputs 22-25 devices.  The device works as follows.  In the initial state, the two-channel interface receives requests that consist of the WRITE command with the channel address of the device from any channel of the computer1.  or computer 2, arriving at any inputs 22 and 24 channels, which, through information input block 3 and information output block 9, arrive at the corresponding inputs of AND 13-16 elements of the exchange direction generator 2, where requests received from input / output channels are used as primary priority lower number, and secondary priority requests, the receipt from a computer with a lower number, t. e.  the highest priority will be the request from the first computer of the first I / O channel, and the lowest priority from the second computer of the second I / O channel.  A service request consists of a command and a maximum of the corresponding device channel.  When receiving a high-priority request at the appropriate form-output.  rover 2 directions of exchange, a signal is generated which breaks down the reception by the information input unit 3 or the device request information output information unit 9.  The information input unit 3 or; the information output unit 9, which receives a request, generates a signal at the third output, which sets in the second memory 11 a sign characterizing the operation mode of the device, as well as forleipyeT and, via the corresponding output, 23 or 25 devices in the device The input / output of the computer status is ENABLE; the other input-output channels of the computer, which have issued service requests from the outputs of the fifth, sixth, seventh elements And 19-21, are in the BUSY state.  in a two-channel interface device, the information from the input-output section of the computer transmitter to the corresponding main channel 1 of the device and through the corresponding information input unit 3 or information output unit 9 and the first switch 4 enters the other channel 1 of the device.  Further, the information is recorded, via the second switches 5, the first registers 6, into the first memories 7 of the main and additional channels 1 of the device.  After receiving the information block, the main channel 1, via output 23 or 25, goes to the input-output-computer-transmitter channel, the end state of the data exchange, and to the corresponding input-output channel. another computer prompts for reading information.  The auxiliary channel 1 of the device for the input-output channel of the computer receiver in the backup channel 1.  After the information from the computer-transmitter information and if there are failures in the main channel 1 of the device or the corresponding input-output channel of the computer, the computer-receiver can automatically switch to interrogation of the additional (backup) channel 1 of the device and obtain information from its first memory 7  The dual-channel interface operates in the following modes: 1 - receiving information from the first input / output channel of the first computer and transmitting it to the first input / output channel of the second computer; 2 - receiving information from the first input / output channel of the first computer and transmitting it to the second input / output channel of the second computer; 3 - receiving information from the second input-output channel of the first computer and transmitting it to the second input-output channel of the second computer 4- receiving information from the second input-output channel of the first computer and transmitting it to the first input-output channel of the second computer; 5 - receiving information from the first input / output channel of the second computer and transmitting it to the first input / output channel of the first computer; b - receiving information from the first input-output channel of the second computer and transmitting it to the second input-output channel of the first computer 7 - receiving information from the second input-output channel of the second computer and transmitting it to. the second input / output channel of the first computer; 8 - receiving information from the second input / output channel of the second computer and transmitting it to the first input / output channel of the first computer.  The operation of the device in all modes can be characterized by the following phases of information exchange between the computer transmitter and the computer receiver: 1 receiving a request (WRITING command and device channel address 1) from the input-output channel of the computer transmitter; 2 the device receives a block of information from the input-output channel of the computer-transmitter.  chica; 3 — device output to the appropriate input / output channel of the state of the end of data exchange; 4 by the main channel 1 of the call device to the corresponding input-output channel of the computer receiver for receiving the READ command; 5 - moreover, the READ command is the main or additional (backup) channel 1 depending on the address of channel 1 issued by the computer-transmitter; b - the device outputs a block of information to the input-output channel of the computer-receiver; 7 shows the status of the device at the end of the data exchange into the input-output channel of the computer-receiver; receiving by the device from the input / output channel of the computer of the receiver of the ERASE command and shutting down the device in the corresponding operation mode.  Consider the operation of the device in MODE 1.  In the QBMEHA PHASE 1, the WRITE command with the device channel 1 address is sent if there is data in the computer transmitter or the INPUT STATE command with the channel 1 address if necessary to obtain information about the device state.  The command with the address is accompanied by a corresponding control signal and is fed to the input 22 of the device and then to the second input of the information input unit 3 of the first channel, in which the signal is generated at the fifth output coming through the third input of the exchange direction generator 2 to the second inputs of the first four elements AND 13–16. In the absence of OPERATION signals on the fifth outputs of the second memory 11 of both channels, which are formed when the computer transmitter has subscribed any channel 1 of the device, the signal is generated at the output of the first element 13. l for the first channel RESOLUTION Ivvoda-output computer which, via the first output of the generator 2 is supplied to the exchange direction fourth input information input unit 3, where the generated state and CONTINUE vvdaets the output 23 of the first channel device.  At the third output of the information input unit 3, a signal is generated that arrives at the first input of the second memory II and establishes in it the WORK and PRINCIPAL signs, under which the first output produces a signal that arrives at the first input of the second switch 5 and allows reading information from the mainstream, t. e.  from the channel to which it is connected.  If the REQUEST is generated by the INPUT STATUS command, then if the device is not occupied, the READY state is formed at the output 23 of the first channel, which is transmitted to the nep computer I / O channel.  In PHASE 2 EXCHANGES, information from the first I / O channel of the COMPUTER1 through input 22 of the first channel of the device enters the information input unit 3 at the first output of which a RECORD signal is formed, which through the first input enters the distributor where the following signals are generated: at the third output the address code for the first, memory 7, the signal at the first output, which, arriving at the first input of the information input unit 3, allows the output of information through the first output c. first switch 4; the signal at the eighth output, allowing the passage of information through the first switch 4; the signal at the second output, allowing the transfer of information through the first register 6.  Thus, information from the first input-output channel of the computer 1, under the control of the signals of the distributor 10, passes through the input unit 3. information, the first and second switches 4 and b, the first register b and is recorded in the first memory 7.  At the sixth and seventh outputs of the distributor 10, signals are generated, which arrive respectively at the fourth and fifth inputs of the distributor 10 of the second channel 1 of the device, under the control of which signals are generated at the second, third and ninth outputs of the distributor 10 of the second channel of the device.  The signal from the ninth output, arriving at the second input of the second memory 11, forms the WORK and RESERVE CHANNEL signs, under the control of which, at the first exit, a signal is generated allowing the information to pass through the second switch 5 of the second channel 1 of the device.  The signal from the second output of the distributor 10 of the second channel 1 of the device allows the signal to pass through the first register 6.  At the output of the driver, a code is written to the address in the first memory 7 of the second channel of the device.  As a result, information from the output of the first switch 4 of the first (main) channel enters the second channel (backup), where through the second switch 5, the first register 6 is recorded in the first memory 7.  . With the receiving of the trailing edge of the control signal from the first I / O channel of the computer1, a special sign END OF EXCHANGE is formed and recorded in the first memories 7 of both channels as the last information sign.  This completes the -PHASE 2 EXCHANGE, -In the PHASE 3 EXCHANGE from the first I / O channel of the COMPUTER 1, the EXIT STATUS command is sent to the device input 22 accompanied by the device address and the corresponding control signal, in response to which the information input unit 3 produces the READY state -CONTINUE.  In the SWAPE PHASE 4, under the control of a signal from the fifth distributor output in the information output block 9, a CALL signal is generated, which is fed through output 25 to the first I / O channel of computer 2.  In the PHASE 5 EXCHANGE from the first I / O channel of the COMPUTER 2, the READ command is sent to the input 24 of the device, in response to which the information output block 9 generates the READY state at the output 25 of the first channel 1 of the device.  In PHASE 6 EXCHANGE from the first channel of the withdrawal-output of the computer 2, the device receives a control signal signifying the beginning of the reception of information by the I / O channel.  The information output block 9 generates the READ signal, which comes through the third input to the distributor 10, as a result, the c1 Address code and the first memory control signal 7 are generated at the third output, and the signal allowing the information to pass through the second register 8 / and p The output signal is generated in the output unit 9.  Under the control of these signals, information from the first memory 7 of the first channel 1 of the device enters the second input of the distributor, where it is analyzed for a special sign END OF EXCHANGE, as well as through the second register 8 and the information output block 9, the output 25 of the first channel 1 of the device first channel computer2.  The process of reading information from the first memory 7 ends with the receipt of the special attribute END SHARING by the distributor 10.  In the PHASE 7 EXCHANGE from the first I / O channel of the COMPUTER 2, the device receives, at the input 24 of the first channel 1 of the device, the command EXITING STATUS accompanied with the address.  In the information output block 9, the READY-CONTINUE state is generated, arriving via output 25 into the first input / output channel of computer 2.  The output of this state means that the reading of information is completed normally and that a copy of the information is stored in the first memory 7.  In this case, new information can be recorded in the first pack 7.  In PHASE 8 EXCHANGES, the DELETE command via input 24 comes from the first input-output channel of computer 2, and under its control signals are generated at the second and third output of information output unit 9.  The signal from the third output of the information output unit 9 sets to zero the second memory 11, which in turn sets the second memory 11 of the other channel to zero under the control of signals supplied to the fourth, fifth and sixth inputs.  The signal from the second output through the valve enters the block 3 input information, at the end of this phase. The information output unit 9 and the information input unit 3 deliver to the corresponding input / output channels of the state computer READY, after which the device is ready to receive a new request.  Consider the operation of the device in other modes of operation, taking into account that in this case some EXCHANGE PHASES completely coincide with the EXCHANGE PHASES in MODE 1.  IN MODE 2 PHASES 1-4 EXCHANGE completely coincides with the corresponding phases of MODE 1.  The EXCHANGE PHASE 5 is characterized by the arrival from the second I / O channel of the COMPUTER 2 through the input 24 of the READ command and the channel i addresses of the device to the information output unit 9, which forms the READY state and consumes the output 25 of the second I / O channel of the COMPUTER2.  In this mode, unlike the MA 1 MODE, information is output from the second memory 7 to the second input / output channel of the computer 2.  Consider the operation of the device in MODE 3.  In the EXCHANGE PHASE 1, the WRITE command is sent to the input 22 of the second channel to the address of the channel 1 of the device, under whose control, at the fifth output of the information input unit 3, a signal is generated that arrives at the fourth inputs of the third and fourth elements 15 and 16 and at the second input of the sixth element And 20.  In the absence of OPERATION signals on the fifth outputs of the second memory 11 of both channels and in the absence of requests from the first input / output channels of the computer and computer 2, a RESOLUTION OF OPERATION signal is formed with the second input / output channel of the computer 1 at the output of the third element 15 and The exchange direction 2 is fed to the fourth input of the information input unit 3, where the CONTINUE state is generated and output is provided to the output 23 of the second channel 1 of the device.  Further, the operation of the device is similar to MODE 1, only With reference to the information transmitter - the second I / O channel of the computer1.  The operation of the device in MODE 4 is analogous to the operation in MODE 2, only the information is output to the first I / O channel of the computer 2.  Consider the operation of the device in MODE 5.  IN PHASE 1 EXCHANGE at input 24 of the first-.  The first channel 1 of the device receives a WRITE command with the address of the channel 1 of the device, under whose control, at the fifth output of the information output block 9, the first channel generates a signal that goes to the third inputs of the third, fourth and fifth elements 14 - 16 and the second input of the fifth . element and 19.  When there are no OPERATION signals on the fifth outputs of the second memory 11 of both channels and in the absence of a request from the first computer I / O channel, the RESOLUTION OF WORK signal from the first channel of the computer 2 is generated at the output of the second element 14 and is transmitted through the third output of the exchange driver 2 to the fourth input of the information output unit 9, where the CONTINUE state is generated and output. on the output 25 of the first channel 1 device.  Further, the operation of the device is similar to MODE 1, only with reference to the information transmitter - the first I / O channel of the computer 2.  The operation of the device in MODE 6 is similar to the operation in MODE 2, only information is output to the second I / O channel of the computer1.  Consider the operation of the device in MODE 7.  In the EXCHANGE PHASE 1, the WRITE command is sent to the input 24 of the second channel with the device channel address 1 which, at the fifth output of the second channel information output block 9, generates a signal that arrives at the fifth input of the fourth element 16 and the second input seventh 1X5 element 21 .  In the absence of OPERATION signals on the fifth outputs of the second memory 11 of both channels and in the absence of requests from the other exchange directions, the RESOLUTION OF WORK with the second I / O channel of the computer 2 is generated at the output of the fourth element AND 16, which through the fourth output of the imaging unit 2 of the exchange direction goes to the fourth input of the information output unit 9, where the CONTINUE state is generated and provided to the output 25 of the second channel of the device.   ; Further, the operation of the device is similar to MODE 1, only in relation to the information transmitter - the second I / O channel of the computer 2.  Device operation in MODE 8 is similar to operation in MODE 2, only; information is output to the first channel of the computer I / O.

The application of the invention for the integration of two E-A with two alternative input-output channels allows for an increase in exchange efficiency in a two-hyaine complex-k ce by 20%.

25 eupg

woo nett $ biil channel

B / 6

emg

2if second channel

Claims (2)

1. A TWO-CHANNEL MATCHING device, containing in each channel an information input unit, the first output of which is connected to the first input of the distributor, the first output of which is connected to the first input of the information input unit, the second input and output of which are connected to the first input and output of the channel, respectively, the first a register whose output is connected through the first memory to the input of the second register and the second input of the distributor, the second, third and fourth outputs of which are connected to the inputs of the first register, first memory the second and the second register, the output of which is connected to the third input of the information input unit and the first input of the information output unit, the second input and the first output of which are connected respectively to the second inputs of the channel output, the second output of the information output unit is connected to the third input of the distributor, the fifth output of which is connected with the third input of the information output unit, the sixth and seventh outputs of the distributor of one channel are connected respectively to the fourth and fifth inputs of the distributor of another channel, characterized in that, for the purpose To increase the utilization rate of equipment, an exchange direction former is introduced into it, and two switches and a second memory are introduced into each channel, and the third outputs of the information input and output blocks are connected to the first and second inputs of the second memory, the first output of which is connected to the first input the first switch, the output of which is connected to the input of the first register, the fourth outputs of the input and output information blocks and the eighth output of the distributor through the second switch are connected to the second input of the first switch th channel to a third input of the first switch of the other channel, the ninth output of the distributor is connected to the third input of the second memory, the fourth _to fifth, fifth and sixth inputs of the second © PA-RAM memory of one channel are connected respectively to the second, third and fourth. by the outputs of the second memory of another channel, the fifth outputs of the second memories of both channels are connected to the first and _ second inputs of the shaper of the exchange direction, the first and second outputs. ** and the third and fourth inputs of which are connected respectively to the fourth inputs and fifth outputs of the information input blocks of the first and second channel, respectively, the fourth inputs and fifth outputs of the information output blocks of both channels are connected to the third and fourth outputs and the fifth and sixth inputs, respectively shaper directions of exchange. 2. The device according to π. 1, characterized in that the shaper of the exchange direction contains the elements AND, OR, the first and second inputs of the shaper through the first element OR connected to the first inputs of the first four elements AND, the second inputs of which are connected to the third input of the shaper, the output of the first element AND connected to the first output of the driver, the first inputs of the second and third elements OR and the fifth element AND, the second input of which is connected to the third input of the second, third and fourth elements And with the fifth input of the driver, the output is second of the first AND element is connected to the third output of the driver and to the second inputs of the second and third OR elements, the outputs of which are connected to the first inputs of the sixth and seventh elements, respectively, the output of the third AND element is connected to the third input of the third OR element and the second output of the driver, the fourth inputs of the third and the fourth element And combined with the second input of the sixth element and 'and connected to the fifth input of the shaper., the fifth input of the fourth element, element And combined with the second input of the seventh element And and connected to the first input of the shaper, the output of the fourth element And is connected to the fourth output of the shaper, the outputs of the fifth, sixth, and seventh elements of And fourth with the fourth body. are connected according to the third, second and outputs