SU1022305A1 - Pulse repetition frequency doubler - Google Patents

Abstract

Knockout frequency pulses, contents of the inverter, the input, which is connected to the input bus, and the element of equivalence, that is, and that with the chain up. Sheni1 | values, two and first and second elements are entered into it, and the first inputs of the last are connected respectively with the input and output of the inverter, the second inputs with inverse outputs of the second and first triggers, respectively. and the output is with single inputs of the first and second triggers, respectively, the KOTO1X2X outputs are connected to the inputs of the equivalence element, and zero inputs are connected to the output and input of the inverter, respectively. ffA / fffff 0fff.f

Description

The invention relates to a pulse technique, in particular, to devices for multiplying the pulse frequency and can be used in automation and computing devices.

A pulse frequency doubler is known that contains a match element, an inverter, a delay element, and an OR element i.

A disadvantage of the known device is that the multiplication accuracy is not high enough.

The closest in technical essence to the present invention is a pulse frequency frequency doubler containing an element of equivalence, the first input of which is connected to the input bus directly, and the second input through inverters 2.

A disadvantage of the known device is the low multiplication accuracy due to the dependence of the duration and amplitude of the output pulses on the time parameters of the delay elements (inverters) and, consequently, the strong influence of the time parameters spread of the delay elements. On the operation stability of the frequency doubler, as with a short delay time and the amplitude of the output pulses may not be sufficient for normal operation of subsequent devices. In order to ensure the normal operation of the frequency doubler, in each particular case, it is necessary to select a delay value by selecting the delay elements themselves or their number.

The purpose of the invention is to increase the accuracy of multiplication.

To this end, two triggers and the first and second elements AND, the first inputs of the latter are connected to the input and output of the inverter, the second inputs are entered into the frequency doubler of the frequency of pulses that contains an inverter whose input is connected to the input bus and an equivalence element. with inverse outputs of the second and first, respectively, triggers, and outputs with single inputs of the first and second triggers, respectively, the direct outputs of which

connected to the inputs of the element of equivalence, and zero inputs - respectively with the output and input of the inverter.

Figure 1 shows the block diagram of the device / figure 2 - time diagrams that explain his work.

The device contains an inverter 1, the elements And 2 and 3, RS-triggers 4 and 5, the element b equivalence.

The device works as follows.

The input pulses (Fig. 2a | are fed to the input of the inverter 1, to the input of the element AND 2, and to the zero input of the trigger 5. By the positive input voltage of the input pulse, the trigger 5 is set to the zero state. Only after the trigger 5 is set to the zero state , at the input of the element AND 2, the potential with the inverse output of the trigger 5 (FIG. 2e) enables the installation of the trigger 4 in the single state. The trigger 4 is set to the single state by the leading edge of the pulse from the output of the element AND 2 {fig.2b), Triggers 4 is set to zero. e, the positive edge of the pulse output from the inverter 1 (Figure 2 B) which corresponds to the falling edge of the input pulse. Only after the trigger 4 is set to the zero state, at the input of the element I 3 there is a potential from the inverse output of the trigger 4 (fig.2d), which allows the setting of the trigger 5 to be in one state. The trigger 5 is set to one state by the leading edge of the pulses from the output of the element And 3 (Fig. 2 g). .

From the direct outputs of the flip-flops 4 and 5, the pulses arrive at element b, and at the output of the CAT. OTHER pulses of double frequency are obtained (Fig. 2i). The stable formation of double frequency pulses is ensured by the fact that a change in the state of one trigger occurs only after a change in the state of another.

The use of the proposed invention allows to obtain a frequency doubler, which ensures stable operation and does not require the selection of delay elements.

Claims (1)

PULSE FREQUENCY FREQUENCY DOUBLER, containing an inverter, an input that is connected to the input bus, and an equivalence element, which is different in order to increase. According to ~ accuracy, two triggers and the first and second elements of AND are introduced into it, with ^ its ^ the first inputs of the latter are connected to the input and output of the inverter * respectively, the second inputs are with the inverse outputs of the second and first triggers, respectively, and the output with single inputs of the first and second triggers, respectively, whose outputs are connected directly to the inputs of the equivalence element, and the zero inputs, respectively, with the output ”* and the inverter input.