SU1016785A1 - Variable priority device - Google Patents

Abstract

PEPE EHHOFO PRIORITY DEVICE, containing the query register, shift register, decoder and trigger, the group of information inputs of the query register being a group of device request inputs, characterized in that the device contains a group of elements AND, an encoder, element IS -NON and two elements, And, the direct and inverse outputs of the trigger are connected to the inputs of the first and second elements, respectively, the second inputs of which are connected to the clock input of the device, the outputs of the first and second And elements are connected respectively to the first and second control inputs of the shift register, each output of which is connected to the first input of the corresponding element And group, the second inputs of elements AND of the group are connected to the corresponding outputs of the query register, outputs of elements And of the group are connected to the group of inputs of the encoder, outputs which are the group of infostational outlets of the device, the inputs of the element ILY are NOT connected to the outputs of the elements AND of the group, the output of the element ILINE is connected to the third inputs of the first and second Elements I, the group of inputs S of the priority code of the device is connected (L with the group of inputs of the decoder, the group of outputs of which is connected to the group of inputs of the shift register, the first and second inputs of the direction of the shift of the device are connected respectively by eg single "zero trigger inputs. // W O) a 00 ate

Description

The invention relates. computational technique and can find application in interrupt devices. A variable priority device is known that contains a priority register, counter zero analysis unit, a cyclic shift register, an analysis unit per unit of the senior and, accordingly, lower order bits of the cyclic shift register, a control unit, a 10 direction shift trigger, a content inversion unit counter [13.

The disadvantage of this device is the high hardware costs.

The closest in technical essence and the achieved result to the proposed one is a variable priority device containing a register, a decoder, a trigger unit for detecting priority discharges / counter, an invert unit for the contents of the counter, a shift register and a control unit [2].

The disadvantage of this device is its complexity due to the high cost of equipment.

The purpose of the invention is to reduce the volume of equipment.

This goal is achieved by the fact that in the device of variable priority, which contains a register of requests, a shift register, a decoder and a trigger, and the group of information inputs of the request register is a group of request inputs of the device, a group of AND elements, an encryptor, an OR-NOT element and two elements are introduced And, moreover, the direct and inverse outputs of the trigger are connected to the first inputs of the first and second elements And, the second inputs of which are connected to the clock input of the device, the outputs of the first and second elements And are connected to responsibly with the first and second control inputs of the shift register, each input of which is connected to the first input of the corresponding element AND groups, the second inputs of the elements and groups are connected to the corresponding outputs of the request register, the outputs of the elements and groups are connected to the encoder group, the outputs of which are the group inform device outputs, inputs of the OR element are NOT connected to the outputs of the elements AND groups, the output of the element OR are NOT connected to the third inputs of the first and second elements AND, the group of code inputs is priority device is connected to a group of inputs of the decoder, a group of outputs torogo Ko · 60 is connected to a group of inputs of the shift register, the first and second inputs of the shift direction ustroystVNIIPI 3387/48 Check bits register currently priiz central va respectively connected with unit and zero trigger inputs.

The drawing shows a structural diagram of the device.

The device contains register 1, register 2 requests, trigger 3, group of elements AND 4, element OR NOT 5, elements AND 6, encoder 7, decoder 8, group of request inputs 9 of the device, group of inputs 10 of the device priority code, inputs 11 of the shift direction devices, clock input 12 devices.

The device operates as follows.

Signals of service requests are received at the inputs of the device ^ and according to their priorities are fixed in the corresponding 2 requests.

The code of the senior in the order is received by the calculator at the inputs of the device 10 to the decoder 8. In this case, the signal corresponding to this priority number is fixed positionally in register 1. The signal that determines the direction of priority arrangement is sent to the corresponding input 11 of the device and sets trigger 3 to the required state. All this is done programmatically. The trigger (shift directions) 3 opens one input of the corresponding element And 6. If there is no request that has a priority equal to the highest priority at the given time, set positionally in shift register 1, then the outputs of the group of elements And 4 signal missing and the element OR NOT 5 opens the corresponding element AND 6 on another input. The clock pulses from the digital computer to input 12, follow through the open element And 6 to the control input of the register 1. Starts the shift of the contents of the register 1 in the direction of decreasing priority. The shift is performed until the values of the pair of the corresponding bits of the register of 2 requests and register 1 of the shift do not match. The signal from the corresponding element And 4 is fed to the input of the encoder 7, at the outputs 13 of which a code appears corresponding to the request that has the highest priority at the given time. It can be used as a modified part of the address. When a signal appears at the output of one of the AND 4 elements, the OR-NOT 5 element locks the And 6 elements, and the request received for service is removed from the corresponding input of the 2 request register.

Claims (1)

A VARIABLE PRIORITY DEVICE comprising a request register, a shift register, a decoder and a trigger, the group of information inputs of the request register being a group of request inputs of a device, characterized in that, in order to reduce the amount of equipment, the device contains a group of AND elements, an encoder, an OR-HE element and two AND elements, the direct and inverse outputs of the trigger connected to the inputs of the first and second second elements AND, the second inputs of which are connected to the clock input of the device, the outputs of the first and second And elements are connected respectively to the first and second control inputs of the shift register, each output of which is connected to the first input of the corresponding element And groups, the second inputs of elements and groups are connected to the corresponding outputs of the request register, the outputs of the elements And groups are connected to the group of inputs of the encoder, the outputs of which are group of information outputs of the device, the inputs of the element are NOT connected to the outputs of the elements of the group, the output of the element is connected to the third inputs of the first and second elements AND , the group of inputs of the device priority code is connected to the group of inputs of the decoder, the group of outputs of which is connected to the group of inputs of the shift register, the first and second inputs of the direction of the shift of the device are connected respectively to the unit and zero inputs of the trigger. pa