SI8812388B - Polprevodniška naprava, metoda za njeno proizvodnjo, naprava za izvedbo metode in montažno postrojenje - Google Patents

Polprevodniška naprava, metoda za njeno proizvodnjo, naprava za izvedbo metode in montažno postrojenje Download PDF

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SI8812388B
SI8812388B SI8812388A SI8812388A SI8812388B SI 8812388 B SI8812388 B SI 8812388B SI 8812388 A SI8812388 A SI 8812388A SI 8812388 A SI8812388 A SI 8812388A SI 8812388 B SI8812388 B SI 8812388B
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connectors
station
capsules
capsule
synthetic resin
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SI8812388A
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English (en)
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SI8812388A (en
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Viktor Heitzler
Richard Kapp
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General Semiconductor Ireland
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Publication of SI8812388A publication Critical patent/SI8812388A/sl
Publication of SI8812388B publication Critical patent/SI8812388B/sl

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67126—Apparatus for sealing, encapsulating, glassing, decapsulating or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301—Thyristor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Claims (12)

  1. -/2.- PATENTNIZAHTEVKI 1. Polprevodniški element, označen s tem, da vsebuje • predfabricirano plastično ohišje (= kapsula) (1), napolnjeno s tesnilno smolo (2), - čip (4), ki je postavljen na notranji konec enega od več priključkov (3), pri čemer se omenjeni notranji konec vstavi v kapsulo (1), in ima površine, katerih vsaka je povezana z notranjim koncem enega od drugih priključkov (3), in je opremljen s prevleko (5) iz sintetične smole, -žlebove (61, 60, 62) v votlini kapsule (1), ki odgovarjajoče segajo od odprtine kapsule(l) vzdolž ene stranske stene do dna (1a) v pravokotni smeri glede na dno (1a), nato vzdolž le-tega, in nato vzdolž druge stranske stene, ki je paralelna z že omenjeno stransko steno, in - notranje konce (39) priključkov (3), ki so tako vstavljeni v kapsulo (1), da vsak od zunanjih priključkov (31,32) nalega v odgovarjajoči žleb (61, 62) stranske stene in se vanj vstavi z rahlim pritiskom, ter da je zadnji del (38) vsaj enega notranjega konca priključka (39) vsaj delno vstavljen v žleb dna (60).
  2. 2. Polprevodniški element po zahtevku 1, označen s tem, da je narejena vsaj ena grbina (7) na tistih robovih vsakega zunanjega priključka (31, 32), ki so usmerjeni proti stranskim stenam.
  3. 3. Polprevodniški element po zahtevku 1 ali 2, označen s tem, da je v ravnini, ki je pravokotna na ravnino vstavljenih priključkov (3), votlina kapsule (1) samo toliko široka, da se čip (4), priključki (3) in prevleka iz sintetične smole (5) ravno še lahko vstavijo.
  4. 4. Postopek za izdelavo množice polprevodniških elementov po kateremkoli zahtevku od 1 do 3, označen s tem, - da so priključki (3) polprevodniških elementov kombinirani tako, da oblikujejo skelet (8) priključkov, ki je električno in mehanično razdvojen v priključke (3), ki pripadajo posameznim polprevodniškim elementom šele po kompletnem enkapsuliranju polprevodniških elementov, - da se čip (4) namesti na ploščato razširitev (37) enega od pripadajočih priključkov, in da so njegove kontaktne površine povezane s konci (39) ostalih pripadajočih priključkov, - da se vsakemu čipu (4) nato naredi prevleka (5) iz sintetične smole, - da je zagotovljena množica kapsul (1), - da se podskupina (9) več kapsul (1) istočasno polni s potrebno količino tesnilne smole (2), in se pripadajoči čipi (4) skupaj s svojimi notranjimi konci (39) priključkov nato istočasno vstavijo, in - da se skelet (8) priključkov nato segreva, da se posuši vsaj tesnilna smola (2).
  5. 5. Postopek po zahtevku 4, označen s tem, da se prevleka iz sintetične smole (5) oblikuje z nanašanjem kapljice iz sintetične smole ali prahu iz sintetične smole, kar se nato segreva.
  6. 6. NCprava za vstavljanje čipov (4) ter njihovih priključkov v kapsule (1) po zahtevku 4 ali 5, označena s tem, da vsebuje -dovodno tračnico (10), na katero vstopajo kapsule (1) s svojimi odprtinami, usmerjenimi navzgor, ki ima na izhodnem koncu nameščen drsnik (11) za centriranje, ki je gibljiv v svoji vzdolžni smeri in je pravokoten na dovodno tračnico (10) ter ulovi podskupino (9) s strani, -vrtljivi lovilec (12), ki sledi izhodni odprtini dovodne tračnice (10), in na katerega potisne drsnik (11) za centriranje podskupino (9), - prednostno navpično gibljivo pripravo (13) za doziranje tesnilne smole, ki je postavljena nad odprtine kapsul (1), in ki ima toliko priključkov (14), kot je kapsul (1) v podskupini (9), pri čemer so razdalje med priključi (14) enake kot med kapsulami, ki so postavljene ena poleg druge, in • napravo (15) za pridržanje navzdol, ki začasno fiksira del skeleta (8) priključkov, na katerem se nahaja vsaj nekaj čipov (4), in katera je postavljena nad vrtljivim lovilcem (12) tako, da se podskupina kapsul, ki jih ta drži, po vrtljivem gibanju prilega na fiksirane čipe (4).
  7. 7. Naprava po zahtevku 6, označena s tem, da ima dovodna tračnica (10) presek U oblike z dnom (16), daljšim krakom (17) in krajšim krakom (18), in da je drsnik (11) za centriranje nameščen na krajšem kraku (18).
  8. 8. Naprava po zahtevku 7, označena s tem, da ima vrtljivi lovilec (12) pravokotno vdolbino (19), katere navpična površina (20) je na isti višini kot notranja stena daljšega kraka (17), in katere horizontalna površina (21) je na isti višini kot dno (16) dovodne tračnice (10). —1Β-
  9. 9. Naprava po kateremkoli zahtevku od 6 do 8, označena s tem, da je naprava (13) za doziranje tesnilne smole opremljena z izhodno cevko.
  10. 10. Naprava po kateremkoli zahtevku od 6 do 9, označena s tem, da ima vrtljivi lovilec (12) več sesalnih odprtin (22) v navpični površini (20), katerih število je enako številu kapsul (1 ) v podskupini (9).
  11. 11. Postroj za sestavljanje množice polprevodniških elementov po kateremkoli zahtevku od 1 do 3, označen s tem, - da se na eni njegovi strani nahaja goli skelet (8) priključkov, navit na kolut (81), iz katerega potuje skozi naslednje postaje, ki so razporejene ena za drugo v smeri transporta: - postajo za postavljanje čipov (23), - priključevalno postajo (24), - postajo za pokrivanje (25), - postajo za postavljanje kapsul (26), in - da se skelet (88) priključkov, opremljen s polprevodniškimi elementi, na drugi strani postroja za sestavljanje navija na kolut (82).
  12. 12. Postroj za sestavljanje po zahtevku 11, označen s tem, da vsebuje postajo za sušenje (27). ki je za postajo za postavljanje kapsul (26).
SI8812388A 1988-02-20 1988-12-29 Polprevodniška naprava, metoda za njeno proizvodnjo, naprava za izvedbo metode in montažno postrojenje SI8812388B (sl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
PCT/EP1988/000125 WO1989007835A1 (en) 1988-02-20 1988-02-20 Semiconductor component, manufacturing process, device and assembly station
YU238888A YU47829B (sr) 1988-02-20 1988-12-29 Poluprovodnički element, postupak za njegovu proizvodnju, uređaj za izvođenje ovog postupka i odgovarajući montažni uređaj

Publications (2)

Publication Number Publication Date
SI8812388A SI8812388A (en) 1997-08-31
SI8812388B true SI8812388B (sl) 1998-06-30

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SI8812388A SI8812388B (sl) 1988-02-20 1988-12-29 Polprevodniška naprava, metoda za njeno proizvodnjo, naprava za izvedbo metode in montažno postrojenje

Country Status (11)

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US (1) US5083193A (sl)
EP (1) EP0401211B1 (sl)
JP (1) JPH0760880B2 (sl)
KR (1) KR930004237B1 (sl)
DE (1) DE3881218D1 (sl)
HK (1) HK2396A (sl)
MX (1) MX171416B (sl)
MY (1) MY100530A (sl)
SI (1) SI8812388B (sl)
WO (1) WO1989007835A1 (sl)
YU (1) YU47829B (sl)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5521125A (en) * 1994-10-28 1996-05-28 Xerox Corporation Precision dicing of silicon chips from a wafer
JP3132449B2 (ja) * 1998-01-09 2001-02-05 日本電気株式会社 樹脂外装型半導体装置の製造方法
WO2005069369A1 (de) * 2004-01-16 2005-07-28 Continental Teves Ag & Co. Ohg Integriertes bauelement
CN102646662A (zh) * 2011-02-22 2012-08-22 吴江市松陵镇明博精密机械厂 一种to92型号封装盒及配套模具
CN102646661A (zh) * 2011-02-22 2012-08-22 吴江市松陵镇明博精密机械厂 一种to92s型号封装盒及配套模具
CN103617975A (zh) * 2013-11-08 2014-03-05 张轩 一种便于打丝的引线框架

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Publication number Priority date Publication date Assignee Title
US3235937A (en) * 1963-05-10 1966-02-22 Gen Electric Low cost transistor
US3231797A (en) * 1963-09-20 1966-01-25 Nat Semiconductor Corp Semiconductor device
US3465210A (en) * 1967-05-23 1969-09-02 Rca Corp Housing and lead assembly for high-frequency semiconductor devices
US4079511A (en) * 1976-07-30 1978-03-21 Amp Incorporated Method for packaging hermetically sealed integrated circuit chips on lead frames
NL189379C (nl) * 1977-05-05 1993-03-16 Richardus Henricus Johannes Fi Werkwijze voor inkapselen van micro-elektronische elementen.
DE2840972A1 (de) * 1978-09-20 1980-03-27 Siemens Ag Verfahren zur herstellung einer kunststoffkapselung fuer halbleiterbauelemente auf metallischen systemtraegern
US4346396A (en) * 1979-03-12 1982-08-24 Western Electric Co., Inc. Electronic device assembly and methods of making same
JPS57188858A (en) * 1981-05-18 1982-11-19 Matsushita Electronics Corp Plastic molded type semiconductor device
US4460537A (en) * 1982-07-26 1984-07-17 Motorola, Inc. Slot transfer molding apparatus and methods

Also Published As

Publication number Publication date
JPH0760880B2 (ja) 1995-06-28
WO1989007835A1 (en) 1989-08-24
KR900701032A (ko) 1990-08-17
MX171416B (es) 1993-10-26
SI8812388A (en) 1997-08-31
DE3881218D1 (de) 1993-06-24
EP0401211B1 (de) 1993-05-19
HK2396A (en) 1996-01-12
JPH03502855A (ja) 1991-06-27
YU238888A (sh) 1992-12-21
KR930004237B1 (ko) 1993-05-22
YU47829B (sr) 1996-01-09
EP0401211A1 (de) 1990-12-12
MY100530A (en) 1990-10-30
US5083193A (en) 1992-01-21

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