SG87092A1 - Wafer, apparatus and method of chamfering wafer - Google Patents

Wafer, apparatus and method of chamfering wafer

Info

Publication number
SG87092A1
SG87092A1 SG200001491A SG200001491A SG87092A1 SG 87092 A1 SG87092 A1 SG 87092A1 SG 200001491 A SG200001491 A SG 200001491A SG 200001491 A SG200001491 A SG 200001491A SG 87092 A1 SG87092 A1 SG 87092A1
Authority
SG
Singapore
Prior art keywords
wafer
chamfering
chamfering wafer
Prior art date
Application number
SG200001491A
Other languages
English (en)
Inventor
Koma Kikuo
Murai Shirou
Kaga Muneaki
Takata Michihiro
Original Assignee
Nippei Toyama Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippei Toyama Corp filed Critical Nippei Toyama Corp
Publication of SG87092A1 publication Critical patent/SG87092A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B43—WRITING OR DRAWING IMPLEMENTS; BUREAU ACCESSORIES
    • B43K—IMPLEMENTS FOR WRITING OR DRAWING
    • B43K29/00—Combinations of writing implements with other articles
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54493—Peripheral marks on wafers, e.g. orientation flats, notches, lot number
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)
SG200001491A 1999-03-10 2000-03-10 Wafer, apparatus and method of chamfering wafer SG87092A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11063670A JP2000254845A (ja) 1999-03-10 1999-03-10 ウエーハのノッチ溝の面取り方法及びウエーハ

Publications (1)

Publication Number Publication Date
SG87092A1 true SG87092A1 (en) 2002-03-19

Family

ID=13236032

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200001491A SG87092A1 (en) 1999-03-10 2000-03-10 Wafer, apparatus and method of chamfering wafer

Country Status (7)

Country Link
US (1) US6439969B1 (zh)
EP (1) EP1034883A1 (zh)
JP (1) JP2000254845A (zh)
KR (1) KR20000076805A (zh)
CN (1) CN1267085A (zh)
SG (1) SG87092A1 (zh)
TW (1) TW434099B (zh)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003053723A (ja) * 2001-08-10 2003-02-26 Denso Corp 硬脆材料の切断方法
US7102206B2 (en) * 2003-01-20 2006-09-05 Matsushita Electric Industrial Co., Ltd. Semiconductor substrate, method for fabricating the same, and method for fabricating semiconductor device
JP3534115B1 (ja) 2003-04-02 2004-06-07 住友電気工業株式会社 エッジ研磨した窒化物半導体基板とエッジ研磨したＧａＮ自立基板及び窒化物半導体基板のエッジ加工方法
JP4116583B2 (ja) * 2004-03-24 2008-07-09 株式会社東芝 基板処理方法
EP1834731B1 (de) * 2006-03-15 2010-05-12 J. Schneeberger Holding AG Verfahren zum Schleifen von Zerspanungswerkzeugen
JP4809744B2 (ja) * 2006-09-19 2011-11-09 東京エレクトロン株式会社 ウエハの中心検出方法及びその方法を記録した記録媒体
JP2009283616A (ja) * 2008-05-21 2009-12-03 Sumco Corp 半導体ウェーハ
EP2213415A1 (en) * 2009-01-29 2010-08-04 S.O.I. TEC Silicon Device for polishing the edge of a semiconductor substrate
WO2016088868A1 (ja) * 2014-12-04 2016-06-09 日本電気硝子株式会社 ガラス板
JP6349290B2 (ja) * 2015-09-03 2018-06-27 信越半導体株式会社 単結晶ウェーハの表裏判定方法
JP6504262B2 (ja) * 2015-10-26 2019-04-24 日立金属株式会社 圧粉成形体のエッジ処理装置及び圧粉成形体のエッジ処理方法
KR102468793B1 (ko) 2016-01-08 2022-11-18 삼성전자주식회사 반도체 웨이퍼, 반도체 구조체 및 이를 제조하는 방법
CN108340237A (zh) * 2018-03-27 2018-07-31 京东方科技集团股份有限公司 研磨装置及研磨方法
EP3567138B1 (en) * 2018-05-11 2020-03-25 SiCrystal GmbH Chamfered silicon carbide substrate and method of chamfering
EP3567139B1 (en) 2018-05-11 2021-04-07 SiCrystal GmbH Chamfered silicon carbide substrate and method of chamfering
CN114046749B (zh) * 2021-10-26 2022-07-08 刘红霞 预制混凝土构件点状凹坑结合面粗糙度检测方法及系统
CN118254293B (zh) * 2024-05-11 2024-09-10 江苏福旭科技有限公司 一种单晶硅片倒角设备及使用方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5185965A (en) * 1991-07-12 1993-02-16 Daito Shoji Co., Ltd. Method and apparatus for grinding notches of semiconductor wafer
EP0686460A1 (en) * 1991-06-12 1995-12-13 Shin-Etsu Handotai Company Limited Method for chamfering notch wafer and apparatus therefor
US5490811A (en) * 1991-06-12 1996-02-13 Shin-Etsu Handotai Co., Ltd. Apparatus for chamfering notch of wafer

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0624199B2 (ja) * 1982-07-30 1994-03-30 株式会社日立製作所 ウエハの加工方法
US5117590A (en) * 1988-08-12 1992-06-02 Shin-Etsu Handotai Co., Ltd. Method of automatically chamfering a wafer and apparatus therefor
US4905425A (en) * 1988-09-30 1990-03-06 Shin-Etsu Handotai Company Limited Method for chamfering the notch of a notch-cut semiconductor wafer
JP2571477B2 (ja) * 1991-06-12 1997-01-16 信越半導体株式会社 ウエーハのノッチ部面取り装置
JP2798345B2 (ja) 1993-06-11 1998-09-17 信越半導体株式会社 ウェーハのノッチ部研磨装置
JPH09168953A (ja) 1995-12-16 1997-06-30 M Tec Kk 半導体ウェーハのエッジ研摩方法及び装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0686460A1 (en) * 1991-06-12 1995-12-13 Shin-Etsu Handotai Company Limited Method for chamfering notch wafer and apparatus therefor
US5490811A (en) * 1991-06-12 1996-02-13 Shin-Etsu Handotai Co., Ltd. Apparatus for chamfering notch of wafer
US5185965A (en) * 1991-07-12 1993-02-16 Daito Shoji Co., Ltd. Method and apparatus for grinding notches of semiconductor wafer

Also Published As

Publication number Publication date
US6439969B1 (en) 2002-08-27
TW434099B (en) 2001-05-16
JP2000254845A (ja) 2000-09-19
KR20000076805A (ko) 2000-12-26
EP1034883A1 (en) 2000-09-13
CN1267085A (zh) 2000-09-20

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