SG65090A1 - Dry etching method of metal oxide/photoresist film laminate - Google Patents

Dry etching method of metal oxide/photoresist film laminate

Info

Publication number
SG65090A1
SG65090A1 SG1998002914A SG1998002914A SG65090A1 SG 65090 A1 SG65090 A1 SG 65090A1 SG 1998002914 A SG1998002914 A SG 1998002914A SG 1998002914 A SG1998002914 A SG 1998002914A SG 65090 A1 SG65090 A1 SG 65090A1
Authority
SG
Singapore
Prior art keywords
metal oxide
dry etching
photoresist film
etching method
film laminate
Prior art date
Application number
SG1998002914A
Other languages
English (en)
Inventor
Mitsuru Sadamoto
Noriyuki Yanagawa
Satoru Iwamori
Kenju Sasaki
Original Assignee
Mitsui Chemicals Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui Chemicals Inc filed Critical Mitsui Chemicals Inc
Publication of SG65090A1 publication Critical patent/SG65090A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1884Manufacture of transparent electrodes, e.g. TCO, ITO
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Electromagnetism (AREA)
  • Drying Of Semiconductors (AREA)
  • ing And Chemical Polishing (AREA)
SG1998002914A 1997-08-08 1998-08-06 Dry etching method of metal oxide/photoresist film laminate SG65090A1 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP21475497 1997-08-08
JP28070097 1997-10-14
JP30460297 1997-11-06
JP7981998 1998-03-26
JP14809298 1998-05-28
JP15734298 1998-06-05

Publications (1)

Publication Number Publication Date
SG65090A1 true SG65090A1 (en) 1999-05-25

Family

ID=27551465

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1998002914A SG65090A1 (en) 1997-08-08 1998-08-06 Dry etching method of metal oxide/photoresist film laminate

Country Status (6)

Country Link
US (1) US20010008227A1 (ko)
EP (1) EP0896373A3 (ko)
KR (1) KR100319343B1 (ko)
CN (1) CN1213708A (ko)
ID (1) ID20684A (ko)
SG (1) SG65090A1 (ko)

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US6692903B2 (en) * 2000-12-13 2004-02-17 Applied Materials, Inc Substrate cleaning apparatus and method
JP4032916B2 (ja) * 2001-11-28 2008-01-16 三菱化学株式会社 エッチング液
US20070062647A1 (en) * 2005-09-19 2007-03-22 Bailey Joel B Method and apparatus for isolative substrate edge area processing
US7067995B2 (en) * 2003-01-15 2006-06-27 Luminator, Llc LED lighting system
US20050176191A1 (en) * 2003-02-04 2005-08-11 Applied Materials, Inc. Method for fabricating a notched gate structure of a field effect transistor
JP4558284B2 (ja) * 2003-06-27 2010-10-06 東京エレクトロン株式会社 プラズマ発生方法、クリーニング方法、基板処理方法、およびプラズマ発生装置
FR2876863B1 (fr) * 2004-10-19 2007-01-12 Saint Gobain Dispositif de gravure d'une couche conductrice et procede de gravure
KR100641553B1 (ko) * 2004-12-23 2006-11-01 동부일렉트로닉스 주식회사 반도체 소자에서 패턴 형성 방법
EP1998375A3 (en) 2005-09-29 2012-01-18 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device having oxide semiconductor layer and manufacturing method
US20080009127A1 (en) 2006-07-04 2008-01-10 Hynix Semiconductor Inc. Method of removing photoresist
KR100780660B1 (ko) 2006-07-04 2007-11-30 주식회사 하이닉스반도체 높은 도즈의 이온주입배리어로 사용된 감광막의 스트립방법
JP4999400B2 (ja) * 2006-08-09 2012-08-15 キヤノン株式会社 酸化物半導体膜のドライエッチング方法
KR20080034598A (ko) * 2006-10-17 2008-04-22 삼성전자주식회사 박막 트랜지스터 표시판의 제조 방법
KR101303578B1 (ko) * 2007-01-05 2013-09-09 삼성전자주식회사 박막 식각 방법
MX2010008075A (es) * 2008-01-23 2010-08-04 Solvay Fluor Gmbh Proceso para la fabricacion de celulas solares.
JP5724157B2 (ja) * 2009-04-13 2015-05-27 日立金属株式会社 酸化物半導体ターゲット及びそれを用いた酸化物半導体装置の製造方法
US20110088718A1 (en) * 2009-10-16 2011-04-21 Matheson Tri-Gas, Inc. Chamber cleaning methods using fluorine containing cleaning compounds
KR102254619B1 (ko) * 2013-11-15 2021-05-24 삼성디스플레이 주식회사 표시 기판 및 그의 제조 방법
JP6210039B2 (ja) 2014-09-24 2017-10-11 セントラル硝子株式会社 付着物の除去方法及びドライエッチング方法
US10460984B2 (en) * 2015-04-15 2019-10-29 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating electrode and semiconductor device
US9824893B1 (en) 2016-06-28 2017-11-21 Lam Research Corporation Tin oxide thin film spacers in semiconductor device manufacturing
KR20180093798A (ko) 2017-02-13 2018-08-22 램 리써치 코포레이션 에어 갭들을 생성하는 방법
US10546748B2 (en) * 2017-02-17 2020-01-28 Lam Research Corporation Tin oxide films in semiconductor device manufacturing
CN111771264A (zh) * 2018-01-30 2020-10-13 朗姆研究公司 在图案化中的氧化锡心轴
CN111886689A (zh) 2018-03-19 2020-11-03 朗姆研究公司 无倒角通孔集成方案
US20190385828A1 (en) * 2018-06-19 2019-12-19 Lam Research Corporation Temperature control systems and methods for removing metal oxide films
KR102643106B1 (ko) 2019-06-27 2024-02-29 램 리써치 코포레이션 교번하는 에칭 및 패시베이션 프로세스
US20220004105A1 (en) * 2020-07-01 2022-01-06 Applied Materials, Inc. Dry develop process of photoresist
US20230393325A1 (en) * 2022-06-01 2023-12-07 Phosio Corporation Metal oxide films and uv-curable precursor solutions for deposition of metal oxide films

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4708766A (en) * 1986-11-07 1987-11-24 Texas Instruments Incorporated Hydrogen iodide etch of tin oxide
JPH05251400A (ja) * 1992-03-09 1993-09-28 Nisshin Hightech Kk Itoのドライエッチング方法
JPH08218185A (ja) * 1995-02-10 1996-08-27 Tanaka Kikinzoku Kogyo Kk チタニウム及びチタニウム合金の白金めっき前処理用粗面化エッチング液並びに白金めっき前処理用粗面化エッチング方法
JPH08319586A (ja) * 1995-05-24 1996-12-03 Nec Yamagata Ltd 真空処理装置のクリーニング方法
JPH09205236A (ja) * 1996-01-24 1997-08-05 Citizen Watch Co Ltd 薄膜ダイオード及びその製造方法

Also Published As

Publication number Publication date
CN1213708A (zh) 1999-04-14
KR100319343B1 (ko) 2002-02-19
EP0896373A2 (en) 1999-02-10
US20010008227A1 (en) 2001-07-19
ID20684A (id) 1999-02-11
EP0896373A3 (en) 2001-01-17
KR19990023468A (ko) 1999-03-25

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