SG47138A1 - Resin encapsulating mold die for manufacturing a semiconductor device - Google Patents
Resin encapsulating mold die for manufacturing a semiconductor deviceInfo
- Publication number
- SG47138A1 SG47138A1 SG1996009780A SG1996009780A SG47138A1 SG 47138 A1 SG47138 A1 SG 47138A1 SG 1996009780 A SG1996009780 A SG 1996009780A SG 1996009780 A SG1996009780 A SG 1996009780A SG 47138 A1 SG47138 A1 SG 47138A1
- Authority
- SG
- Singapore
- Prior art keywords
- manufacturing
- semiconductor device
- mold die
- resin encapsulating
- encapsulating mold
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
- B29C45/14655—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S425/00—Plastic article or earthenware shaping or treating: apparatus
- Y10S425/047—Seal ring
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Moulds For Moulding Plastics Or The Like (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7274202A JPH09115936A (ja) | 1995-10-23 | 1995-10-23 | 半導体装置の樹脂封止用金型 |
Publications (1)
Publication Number | Publication Date |
---|---|
SG47138A1 true SG47138A1 (en) | 1998-03-20 |
Family
ID=17538464
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG1996009780A SG47138A1 (en) | 1995-10-23 | 1996-05-08 | Resin encapsulating mold die for manufacturing a semiconductor device |
Country Status (6)
Country | Link |
---|---|
US (1) | US5645864A (ko) |
JP (1) | JPH09115936A (ko) |
KR (1) | KR100208768B1 (ko) |
CN (1) | CN1080934C (ko) |
SG (1) | SG47138A1 (ko) |
TW (1) | TW363258B (ko) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3483994B2 (ja) * | 1995-08-31 | 2004-01-06 | ローム株式会社 | 樹脂パッケージ型半導体装置の成形用金型装置、および半導体装置の樹脂パッケージング方法 |
US5929511A (en) * | 1996-07-15 | 1999-07-27 | Matsushita Electronics Corporation | Lead frame for resin sealed semiconductor device |
US5971734A (en) * | 1996-09-21 | 1999-10-26 | Anam Semiconductor Inc. | Mold for ball grid array semiconductor package |
US6015280A (en) * | 1997-04-28 | 2000-01-18 | Advanced Micro Devices | Apparatus for reducing warping of plastic packages |
US6214273B1 (en) * | 1997-09-30 | 2001-04-10 | Texas Instruments Incorporated | Molding method with the use of modified runners |
JPH11284002A (ja) * | 1998-03-31 | 1999-10-15 | Sumitomo Heavy Ind Ltd | 半導体素子の樹脂封止装置 |
KR200291282Y1 (ko) * | 1999-04-14 | 2002-10-14 | 앰코 테크놀로지 코리아 주식회사 | 반도체패키지용 인쇄회로기판 |
US6856006B2 (en) | 2002-03-28 | 2005-02-15 | Siliconix Taiwan Ltd | Encapsulation method and leadframe for leadless semiconductor packages |
JP3660861B2 (ja) * | 2000-08-18 | 2005-06-15 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
KR100555495B1 (ko) * | 2003-02-08 | 2006-03-03 | 삼성전자주식회사 | 칩 어레이 몰딩용 몰드 다이, 그것을 포함하는 몰딩 장치및 칩 어레이 몰딩 방법 |
US7618249B2 (en) * | 2006-09-22 | 2009-11-17 | Asm Technology Singapore Pte Ltd. | Memory card molding apparatus and process |
CN102903643B (zh) * | 2012-07-07 | 2016-08-10 | 上海鼎虹电子有限公司 | 电子元件封装装置 |
US20160257117A1 (en) | 2013-10-28 | 2016-09-08 | Hewlett-Packard Development Company, L.P. | Encapsulating a Bonded Wire with Low Profile Encapsulation |
JP7492263B2 (ja) * | 2021-06-24 | 2024-05-29 | アピックヤマダ株式会社 | 圧縮成形装置及び圧縮成形方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1271833A (en) * | 1968-07-10 | 1972-04-26 | Hitachi Ltd | Improvements in or relating to encapsulation processes |
JPH0719785B2 (ja) * | 1985-11-30 | 1995-03-06 | ローム株式会社 | 半導体装置の樹脂モールド方法 |
JPH0364035A (ja) * | 1989-08-02 | 1991-03-19 | Hitachi Ltd | 半導体装置製造装置 |
KR920005035Y1 (ko) * | 1989-11-28 | 1992-07-25 | 현대전자산업 주식회사 | 리드프레임 |
JP2564707B2 (ja) * | 1991-01-09 | 1996-12-18 | ローム株式会社 | 電子部品用リードフレームにおけるモールド部のマルチ式成形方法及び成形装置 |
US5214846A (en) * | 1991-04-24 | 1993-06-01 | Sony Corporation | Packaging of semiconductor chips |
JP3411332B2 (ja) * | 1993-07-07 | 2003-05-26 | 本田技研工業株式会社 | 射出成形金型 |
-
1995
- 1995-10-23 JP JP7274202A patent/JPH09115936A/ja active Pending
-
1996
- 1996-01-27 TW TW085100999A patent/TW363258B/zh active
- 1996-04-25 US US08/639,331 patent/US5645864A/en not_active Expired - Lifetime
- 1996-04-26 CN CN96110330A patent/CN1080934C/zh not_active Expired - Fee Related
- 1996-04-27 KR KR1019960013313A patent/KR100208768B1/ko not_active IP Right Cessation
- 1996-05-08 SG SG1996009780A patent/SG47138A1/en unknown
Also Published As
Publication number | Publication date |
---|---|
CN1148730A (zh) | 1997-04-30 |
KR100208768B1 (ko) | 1999-07-15 |
KR970024040A (ko) | 1997-05-30 |
JPH09115936A (ja) | 1997-05-02 |
US5645864A (en) | 1997-07-08 |
TW363258B (en) | 1999-07-01 |
CN1080934C (zh) | 2002-03-13 |
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