SG154594G - Floating gate memories - Google Patents
Floating gate memoriesInfo
- Publication number
- SG154594G SG154594G SG154594A SG154594A SG154594G SG 154594 G SG154594 G SG 154594G SG 154594 A SG154594 A SG 154594A SG 154594 A SG154594 A SG 154594A SG 154594 G SG154594 G SG 154594G
- Authority
- SG
- Singapore
- Prior art keywords
- floating gate
- gate memories
- memories
- floating
- gate
- Prior art date
Links
- 230000015654 memory Effects 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/802—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with heterojunction gate, e.g. transistors with semiconductor layer acting as gate insulating layer, MIS-like transistors
- H01L29/803—Programmable transistors, e.g. with charge-trapping quantum well
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/903—FET configuration adapted for use as static memory cell
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/209,466 US4905063A (en) | 1988-06-21 | 1988-06-21 | Floating gate memories |
CA000600514A CA1327078C (en) | 1988-06-21 | 1989-05-24 | Floating gate memories |
EP89306058A EP0348099B1 (de) | 1988-06-21 | 1989-06-15 | Speicheranordnung mit schwebendem Gate |
DE68917807T DE68917807T2 (de) | 1988-06-21 | 1989-06-15 | Speicheranordnung mit schwebendem Gate. |
JP1156639A JPH0272673A (ja) | 1988-06-21 | 1989-06-19 | メモリー装置、メモリー回路、光検知装置 |
US07/447,286 US4945393A (en) | 1988-06-21 | 1989-12-07 | Floating gate memory circuit and apparatus |
SG154594A SG154594G (en) | 1988-06-21 | 1994-10-21 | Floating gate memories |
HK5095A HK5095A (en) | 1988-06-21 | 1995-01-12 | Floating gate memories |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/209,466 US4905063A (en) | 1988-06-21 | 1988-06-21 | Floating gate memories |
SG154594A SG154594G (en) | 1988-06-21 | 1994-10-21 | Floating gate memories |
Publications (1)
Publication Number | Publication Date |
---|---|
SG154594G true SG154594G (en) | 1995-03-17 |
Family
ID=26664455
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG154594A SG154594G (en) | 1988-06-21 | 1994-10-21 | Floating gate memories |
Country Status (7)
Country | Link |
---|---|
US (1) | US4905063A (de) |
EP (1) | EP0348099B1 (de) |
JP (1) | JPH0272673A (de) |
CA (1) | CA1327078C (de) |
DE (1) | DE68917807T2 (de) |
HK (1) | HK5095A (de) |
SG (1) | SG154594G (de) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5055890A (en) * | 1990-01-25 | 1991-10-08 | The United States Of America As Represented By The United States Department Of Energy | Nonvolatile semiconductor memory having three dimension charge confinement |
US5097308A (en) * | 1990-03-13 | 1992-03-17 | General Instrument Corp. | Method for controlling the switching speed of bipolar power devices |
US5147817A (en) * | 1990-11-16 | 1992-09-15 | Texas Instruments Incorporated | Method for forming programmable resistive element |
US5432356A (en) * | 1993-04-02 | 1995-07-11 | Fujitsu Limited | Semiconductor heterojunction floating layer memory device and method for storing information in the same |
JP2973876B2 (ja) * | 1995-07-07 | 1999-11-08 | 日本電気株式会社 | 化合物半導体メモリ |
US6654847B1 (en) * | 2000-06-30 | 2003-11-25 | Micron Technology, Inc. | Top/bottom symmetrical protection scheme for flash |
FR2818012B1 (fr) | 2000-12-12 | 2003-02-21 | St Microelectronics Sa | Dispositif semi-conducteur integre de memoire |
US6909151B2 (en) * | 2003-06-27 | 2005-06-21 | Intel Corporation | Nonplanar device with stress incorporation layer and method of fabrication |
US7456476B2 (en) * | 2003-06-27 | 2008-11-25 | Intel Corporation | Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication |
US7268058B2 (en) * | 2004-01-16 | 2007-09-11 | Intel Corporation | Tri-gate transistors and methods to fabricate same |
US7154118B2 (en) * | 2004-03-31 | 2006-12-26 | Intel Corporation | Bulk non-planar transistor having strained enhanced mobility and methods of fabrication |
US7027557B2 (en) * | 2004-05-13 | 2006-04-11 | Jorge Llacer | Method for assisted beam selection in radiation therapy planning |
US7579280B2 (en) * | 2004-06-01 | 2009-08-25 | Intel Corporation | Method of patterning a film |
US7042009B2 (en) | 2004-06-30 | 2006-05-09 | Intel Corporation | High mobility tri-gate devices and methods of fabrication |
US7348284B2 (en) * | 2004-08-10 | 2008-03-25 | Intel Corporation | Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow |
US7422946B2 (en) | 2004-09-29 | 2008-09-09 | Intel Corporation | Independently accessed double-gate and tri-gate transistors in same process flow |
US7332439B2 (en) * | 2004-09-29 | 2008-02-19 | Intel Corporation | Metal gate transistors with epitaxial source and drain regions |
US20060086977A1 (en) | 2004-10-25 | 2006-04-27 | Uday Shah | Nonplanar device with thinned lower body portion and method of fabrication |
US7518196B2 (en) | 2005-02-23 | 2009-04-14 | Intel Corporation | Field effect transistor with narrow bandgap source and drain regions and method of fabrication |
US20060202266A1 (en) * | 2005-03-14 | 2006-09-14 | Marko Radosavljevic | Field effect transistor with metal source/drain regions |
US7858481B2 (en) * | 2005-06-15 | 2010-12-28 | Intel Corporation | Method for fabricating transistor with thinned channel |
US7547637B2 (en) * | 2005-06-21 | 2009-06-16 | Intel Corporation | Methods for patterning a semiconductor film |
US7279375B2 (en) * | 2005-06-30 | 2007-10-09 | Intel Corporation | Block contact architectures for nanoscale channel transistors |
US7402875B2 (en) * | 2005-08-17 | 2008-07-22 | Intel Corporation | Lateral undercut of metal gate in SOI device |
US7479421B2 (en) * | 2005-09-28 | 2009-01-20 | Intel Corporation | Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby |
US20070090416A1 (en) * | 2005-09-28 | 2007-04-26 | Doyle Brian S | CMOS devices with a single work function gate electrode and method of fabrication |
US20070090408A1 (en) * | 2005-09-29 | 2007-04-26 | Amlan Majumdar | Narrow-body multiple-gate FET with dominant body transistor for high performance |
US7485503B2 (en) | 2005-11-30 | 2009-02-03 | Intel Corporation | Dielectric interface for group III-V semiconductor device |
US20070152266A1 (en) * | 2005-12-29 | 2007-07-05 | Intel Corporation | Method and structure for reducing the external resistance of a three-dimensional transistor through use of epitaxial layers |
US7494850B2 (en) * | 2006-02-15 | 2009-02-24 | International Business Machines Corporation | Ultra-thin logic and backgated ultra-thin SRAM |
US8143646B2 (en) | 2006-08-02 | 2012-03-27 | Intel Corporation | Stacking fault and twin blocking barrier for integrating III-V on Si |
DE102006059110A1 (de) * | 2006-12-08 | 2008-06-12 | Technische Universität Berlin | Speicherzelle und Verfahren zum Speichern von Daten |
US20080157225A1 (en) * | 2006-12-29 | 2008-07-03 | Suman Datta | SRAM and logic transistors with variable height multi-gate transistor architecture |
US8320191B2 (en) | 2007-08-30 | 2012-11-27 | Infineon Technologies Ag | Memory cell arrangement, method for controlling a memory cell, memory array and electronic device |
US8362566B2 (en) | 2008-06-23 | 2013-01-29 | Intel Corporation | Stress in trigate devices using complimentary gate fill materials |
GB201418888D0 (en) * | 2014-10-23 | 2014-12-10 | Univ Lancaster | Improvements relating to electronic memory devices |
US9590084B2 (en) * | 2014-11-26 | 2017-03-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Graded heterojunction nanowire device |
US11448692B2 (en) | 2018-08-16 | 2022-09-20 | Taiwann Semiconductor Manufacturing Company Ltd. | Method and device for wafer-level testing |
US11073551B2 (en) * | 2018-08-16 | 2021-07-27 | Taiwan Semiconductor Manufacturing Company Ltd. | Method and system for wafer-level testing |
DE102021106795A1 (de) * | 2020-10-16 | 2022-04-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Verfahren und vorrichtung für eine prüfung auf waferebene |
JP2022145020A (ja) | 2021-03-19 | 2022-10-03 | キオクシア株式会社 | メモリシステム |
CN113594167B (zh) * | 2021-07-29 | 2024-03-12 | 上海集成电路制造创新中心有限公司 | 非易失性可编程异质结存储器 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3500142A (en) * | 1967-06-05 | 1970-03-10 | Bell Telephone Labor Inc | Field effect semiconductor apparatus with memory involving entrapment of charge carriers |
CA1215975A (en) * | 1981-11-02 | 1986-12-30 | Paul W. Collins | Process for preparing delta 2,3 and delta 3,4 prostaglandins |
JPS58128093A (ja) * | 1982-01-22 | 1983-07-30 | Mitsubishi Electric Corp | 不揮発性半導体メモリ装置 |
FR2542490B1 (fr) * | 1983-03-11 | 1988-10-07 | Efcis | Memoire permanente a transistors a grille flottante, electriquement reprogrammable sans effacement prealable |
JPS6176666A (ja) * | 1984-09-20 | 1986-04-19 | Fujitsu General Ltd | スパツタリング装置 |
US4763177A (en) * | 1985-02-19 | 1988-08-09 | Texas Instruments Incorporated | Read only memory with improved channel length isolation and method of forming |
JPS61241968A (ja) * | 1985-04-19 | 1986-10-28 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | 半導体記憶装置 |
JPS6235572A (ja) * | 1985-08-08 | 1987-02-16 | Omron Tateisi Electronics Co | 半導体不揮発性メモリ素子 |
FR2600821B1 (fr) * | 1986-06-30 | 1988-12-30 | Thomson Csf | Dispositif semi-conducteur a heterojonction et double canal, son application a un transistor a effet de champ, et son application a un dispositif de transductance negative |
US4821093A (en) * | 1986-08-18 | 1989-04-11 | The United States Of America As Represented By The Secretary Of The Army | Dual channel high electron mobility field effect transistor |
US4766473A (en) * | 1986-12-29 | 1988-08-23 | Motorola, Inc. | Single transistor cell for electrically-erasable programmable read-only memory and array thereof |
-
1988
- 1988-06-21 US US07/209,466 patent/US4905063A/en not_active Expired - Lifetime
-
1989
- 1989-05-24 CA CA000600514A patent/CA1327078C/en not_active Expired - Fee Related
- 1989-06-15 DE DE68917807T patent/DE68917807T2/de not_active Expired - Fee Related
- 1989-06-15 EP EP89306058A patent/EP0348099B1/de not_active Expired - Lifetime
- 1989-06-19 JP JP1156639A patent/JPH0272673A/ja active Pending
-
1994
- 1994-10-21 SG SG154594A patent/SG154594G/en unknown
-
1995
- 1995-01-12 HK HK5095A patent/HK5095A/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
CA1327078C (en) | 1994-02-15 |
JPH0272673A (ja) | 1990-03-12 |
HK5095A (en) | 1995-01-20 |
EP0348099B1 (de) | 1994-08-31 |
EP0348099A2 (de) | 1989-12-27 |
DE68917807D1 (de) | 1994-10-06 |
US4905063A (en) | 1990-02-27 |
EP0348099A3 (en) | 1990-08-22 |
DE68917807T2 (de) | 1995-01-05 |
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