SG152275A1 - Implant damage control by in-situ c doping during sige epitaxy for device applications - Google Patents
Implant damage control by in-situ c doping during sige epitaxy for device applicationsInfo
- Publication number
- SG152275A1 SG152275A1 SG200902889-5A SG2009028895A SG152275A1 SG 152275 A1 SG152275 A1 SG 152275A1 SG 2009028895 A SG2009028895 A SG 2009028895A SG 152275 A1 SG152275 A1 SG 152275A1
- Authority
- SG
- Singapore
- Prior art keywords
- situ
- device applications
- damage control
- implant damage
- doping during
- Prior art date
Links
- 238000000407 epitaxy Methods 0.000 title 1
- 239000007943 implant Substances 0.000 title 1
- 238000011065 in-situ storage Methods 0.000 title 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 abstract 2
- 229910052799 carbon Inorganic materials 0.000 abstract 2
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7848—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
- H01L29/165—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US73235405P | 2005-10-31 | 2005-10-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
SG152275A1 true SG152275A1 (en) | 2009-05-29 |
Family
ID=38130896
Family Applications (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG2012078986A SG185924A1 (en) | 2005-10-31 | 2006-09-15 | Implant damage control by in-situ c doping during sige epitaxy for device applications |
SG200902889-5A SG152275A1 (en) | 2005-10-31 | 2006-09-15 | Implant damage control by in-situ c doping during sige epitaxy for device applications |
SG200606439-8A SG131844A1 (en) | 2005-10-31 | 2006-09-15 | Implant damage control by in-situ c doping during sige epitaxy for device applications. |
SG2014013031A SG2014013031A (en) | 2005-10-31 | 2006-09-15 | Implant damage control by in-situ c doping during sige epitaxy for device applications |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG2012078986A SG185924A1 (en) | 2005-10-31 | 2006-09-15 | Implant damage control by in-situ c doping during sige epitaxy for device applications |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200606439-8A SG131844A1 (en) | 2005-10-31 | 2006-09-15 | Implant damage control by in-situ c doping during sige epitaxy for device applications. |
SG2014013031A SG2014013031A (en) | 2005-10-31 | 2006-09-15 | Implant damage control by in-situ c doping during sige epitaxy for device applications |
Country Status (3)
Country | Link |
---|---|
US (3) | US7947546B2 (zh) |
CN (1) | CN1979787B (zh) |
SG (4) | SG185924A1 (zh) |
Families Citing this family (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7947546B2 (en) | 2005-10-31 | 2011-05-24 | Chartered Semiconductor Manufacturing, Ltd. | Implant damage control by in-situ C doping during SiGe epitaxy for device applications |
US8900980B2 (en) * | 2006-01-20 | 2014-12-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Defect-free SiGe source/drain formation by epitaxy-free process |
US8154051B2 (en) * | 2006-08-29 | 2012-04-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | MOS transistor with in-channel and laterally positioned stressors |
US7605407B2 (en) * | 2006-09-06 | 2009-10-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Composite stressors with variable element atomic concentrations in MOS devices |
US7554110B2 (en) * | 2006-09-15 | 2009-06-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | MOS devices with partial stressor channel |
US7800182B2 (en) * | 2006-11-20 | 2010-09-21 | Infineon Technologies Ag | Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the same |
US7875511B2 (en) * | 2007-03-13 | 2011-01-25 | International Business Machines Corporation | CMOS structure including differential channel stressing layer compositions |
US20080242032A1 (en) * | 2007-03-29 | 2008-10-02 | Texas Instruments Incorporated | Carbon-Doped Epitaxial SiGe |
US7700452B2 (en) * | 2007-08-29 | 2010-04-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained channel transistor |
JP2009152394A (ja) * | 2007-12-20 | 2009-07-09 | Toshiba Corp | 半導体装置及びその製造方法 |
US7838355B2 (en) * | 2008-06-04 | 2010-11-23 | International Business Machines Corporation | Differential nitride pullback to create differential NFET to PFET divots for improved performance versus leakage |
US20100109045A1 (en) * | 2008-10-30 | 2010-05-06 | Chartered Semiconductor Manufacturing Ltd. | Integrated circuit system employing stress-engineered layers |
US8367485B2 (en) * | 2009-09-01 | 2013-02-05 | International Business Machines Corporation | Embedded silicon germanium n-type filed effect transistor for reduced floating body effect |
US8999798B2 (en) * | 2009-12-17 | 2015-04-07 | Applied Materials, Inc. | Methods for forming NMOS EPI layers |
CN102130054B (zh) * | 2010-01-20 | 2013-05-01 | 中芯国际集成电路制造(上海)有限公司 | 改善半导体器件的截止漏电流发散的方法 |
US8502316B2 (en) * | 2010-02-11 | 2013-08-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Self-aligned two-step STI formation through dummy poly removal |
US20110215376A1 (en) | 2010-03-08 | 2011-09-08 | International Business Machines Corporation | Pre-gate, source/drain strain layer formation |
CN102194748B (zh) * | 2010-03-15 | 2014-04-16 | 北京大学 | 半导体器件及其制造方法 |
DE102010029531B4 (de) | 2010-05-31 | 2017-09-07 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Verfahren zur Verringerung der Defektraten in PFET-Transistoren mit einem Si/Ge-Halbleitermaterial, das durch epitaktisches Wachsen hergestellt ist |
US8426278B2 (en) | 2010-06-09 | 2013-04-23 | GlobalFoundries, Inc. | Semiconductor devices having stressor regions and related fabrication methods |
US8642407B2 (en) * | 2010-11-04 | 2014-02-04 | International Business Machines Corporation | Devices having reduced susceptibility to soft-error effects and method for fabrication |
US8637871B2 (en) * | 2010-11-04 | 2014-01-28 | International Business Machines Corporation | Asymmetric hetero-structure FET and method of manufacture |
CN102569082B (zh) * | 2010-12-24 | 2015-05-20 | 中芯国际集成电路制造(上海)有限公司 | 用于制作嵌入式锗硅应变pmos器件结构的方法 |
WO2012102755A1 (en) * | 2011-01-28 | 2012-08-02 | Applied Materials, Inc. | Carbon addition for low resistivity in situ doped silicon epitaxy |
CN102956445A (zh) * | 2011-08-24 | 2013-03-06 | 中芯国际集成电路制造(上海)有限公司 | 一种锗硅外延层生长方法 |
US9006827B2 (en) * | 2011-11-09 | 2015-04-14 | International Business Machines Corporation | Radiation hardened memory cell and design structures |
US8872228B2 (en) * | 2012-05-11 | 2014-10-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained-channel semiconductor device fabrication |
CN103456782B (zh) | 2012-05-28 | 2016-12-14 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
US8836041B2 (en) * | 2012-11-16 | 2014-09-16 | Stmicroelectronics, Inc. | Dual EPI CMOS integration for planar substrates |
US8735241B1 (en) * | 2013-01-23 | 2014-05-27 | Globalfoundries Inc. | Semiconductor device structure and methods for forming a CMOS integrated circuit structure |
CN103985633B (zh) * | 2013-02-08 | 2017-10-20 | 中芯国际集成电路制造(上海)有限公司 | 一种pmos晶体管的制备方法 |
US9269714B2 (en) * | 2013-06-10 | 2016-02-23 | Globalfoundries Inc. | Device including a transistor having a stressed channel region and method for the formation thereof |
WO2015099784A1 (en) * | 2013-12-27 | 2015-07-02 | Intel Corporation | Bi-axial tensile strained ge channel for cmos |
US9419136B2 (en) | 2014-04-14 | 2016-08-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Dislocation stress memorization technique (DSMT) on epitaxial channel devices |
WO2016003575A2 (en) * | 2014-07-02 | 2016-01-07 | Applied Materials, Inc. | Localized stress modulation for overlay and epe |
CN105529268B (zh) * | 2014-10-27 | 2019-01-22 | 中芯国际集成电路制造(上海)有限公司 | 晶体管及其形成方法 |
US9536736B2 (en) | 2015-02-04 | 2017-01-03 | International Business Machines Corporation | Reducing substrate bowing caused by high percentage sige layers |
US9837415B2 (en) * | 2015-06-25 | 2017-12-05 | International Business Machines Corporation | FinFET structures having silicon germanium and silicon fins with suppressed dopant diffusion |
US9728642B2 (en) | 2015-11-04 | 2017-08-08 | International Business Machines Corporation | Retaining strain in finFET devices |
US10062695B2 (en) * | 2015-12-08 | 2018-08-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and manufacturing method thereof |
US11088033B2 (en) | 2016-09-08 | 2021-08-10 | International Business Machines Corporation | Low resistance source-drain contacts using high temperature silicides |
WO2018089217A1 (en) | 2016-11-11 | 2018-05-17 | Applied Materials, Inc. | Hybrid laser and implant treatment for overlay error correction |
WO2019005090A1 (en) * | 2017-06-30 | 2019-01-03 | Intel Corporation | SOURCE AND DRAIN CONTACTS OF SEMICONDUCTOR OXIDE DEVICE COMPRISING GRADUATED INDIUM LAYERS |
CN111095529A (zh) * | 2017-09-29 | 2020-05-01 | 英特尔公司 | 用于提升nmos晶体管中的沟道应力的器件、方法和系统 |
CN111033755A (zh) * | 2017-09-29 | 2020-04-17 | 英特尔公司 | 利用绝缘结构施加晶体管沟道应力的设备、方法和系统 |
JP2020047670A (ja) * | 2018-09-14 | 2020-03-26 | キオクシア株式会社 | 半導体装置及び半導体記憶装置 |
US10971625B2 (en) * | 2019-06-30 | 2021-04-06 | Globalfoundries U.S. Inc. | Epitaxial structures of a semiconductor device having a wide gate pitch |
Family Cites Families (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5985703A (en) * | 1994-10-24 | 1999-11-16 | Banerjee; Sanjay | Method of making thin film transistors |
US6153920A (en) * | 1994-12-01 | 2000-11-28 | Lucent Technologies Inc. | Process for controlling dopant diffusion in a semiconductor layer and semiconductor device formed thereby |
US5710450A (en) * | 1994-12-23 | 1998-01-20 | Intel Corporation | Transistor with ultra shallow tip and method of fabrication |
US6399970B2 (en) * | 1996-09-17 | 2002-06-04 | Matsushita Electric Industrial Co., Ltd. | FET having a Si/SiGeC heterojunction channel |
US6333217B1 (en) * | 1999-05-14 | 2001-12-25 | Matsushita Electric Industrial Co., Ltd. | Method of forming MOSFET with channel, extension and pocket implants |
US6274894B1 (en) * | 1999-08-17 | 2001-08-14 | Advanced Micro Devices, Inc. | Low-bandgap source and drain formation for short-channel MOS transistors |
US7391087B2 (en) * | 1999-12-30 | 2008-06-24 | Intel Corporation | MOS transistor structure and method of fabrication |
US6566204B1 (en) * | 2000-03-31 | 2003-05-20 | National Semiconductor Corporation | Use of mask shadowing and angled implantation in fabricating asymmetrical field-effect transistors |
US7064399B2 (en) * | 2000-09-15 | 2006-06-20 | Texas Instruments Incorporated | Advanced CMOS using super steep retrograde wells |
US6544854B1 (en) * | 2000-11-28 | 2003-04-08 | Lsi Logic Corporation | Silicon germanium CMOS channel |
WO2002052652A1 (fr) | 2000-12-26 | 2002-07-04 | Matsushita Electric Industrial Co., Ltd. | Composant a semi-conducteur et son procede de fabrication |
US6576535B2 (en) | 2001-04-11 | 2003-06-10 | Texas Instruments Incorporated | Carbon doped epitaxial layer for high speed CB-CMOS |
US6806151B2 (en) * | 2001-12-14 | 2004-10-19 | Texas Instruments Incorporated | Methods and apparatus for inducing stress in a semiconductor device |
US6492216B1 (en) * | 2002-02-07 | 2002-12-10 | Taiwan Semiconductor Manufacturing Company | Method of forming a transistor with a strained channel |
US6800910B2 (en) * | 2002-09-30 | 2004-10-05 | Advanced Micro Devices, Inc. | FinFET device incorporating strained silicon in the channel region |
US6921913B2 (en) * | 2003-03-04 | 2005-07-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Strained-channel transistor structure with lattice-mismatched zone |
US6909186B2 (en) * | 2003-05-01 | 2005-06-21 | International Business Machines Corporation | High performance FET devices and methods therefor |
US6927414B2 (en) * | 2003-06-17 | 2005-08-09 | International Business Machines Corporation | High speed lateral heterojunction MISFETs realized by 2-dimensional bandgap engineering and methods thereof |
US7208362B2 (en) * | 2003-06-25 | 2007-04-24 | Texas Instruments Incorporated | Transistor device containing carbon doped silicon in a recess next to MDD to create strain in channel |
US20040262683A1 (en) * | 2003-06-27 | 2004-12-30 | Bohr Mark T. | PMOS transistor strain optimization with raised junction regions |
US6891192B2 (en) * | 2003-08-04 | 2005-05-10 | International Business Machines Corporation | Structure and method of making strained semiconductor CMOS transistors having lattice-mismatched semiconductor regions underlying source and drain regions |
US20050035369A1 (en) | 2003-08-15 | 2005-02-17 | Chun-Chieh Lin | Structure and method of forming integrated circuits utilizing strained channel transistors |
US6831350B1 (en) * | 2003-10-02 | 2004-12-14 | Freescale Semiconductor, Inc. | Semiconductor structure with different lattice constant materials and method for forming the same |
US7227205B2 (en) * | 2004-06-24 | 2007-06-05 | International Business Machines Corporation | Strained-silicon CMOS device and method |
US7169675B2 (en) * | 2004-07-07 | 2007-01-30 | Chartered Semiconductor Manufacturing, Ltd | Material architecture for the fabrication of low temperature transistor |
US7122435B2 (en) * | 2004-08-02 | 2006-10-17 | Texas Instruments Incorporated | Methods, systems and structures for forming improved transistors |
US7279430B2 (en) * | 2004-08-17 | 2007-10-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Process for fabricating a strained channel MOSFET device |
US7145166B2 (en) * | 2004-08-19 | 2006-12-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | CMOSFET with hybrid strained channels |
US7112848B2 (en) * | 2004-09-13 | 2006-09-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Thin channel MOSFET with source/drain stressors |
US7268049B2 (en) * | 2004-09-30 | 2007-09-11 | International Business Machines Corporation | Structure and method for manufacturing MOSFET with super-steep retrograded island |
US20060118878A1 (en) * | 2004-12-02 | 2006-06-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | CMOS device with selectively formed and backfilled semiconductor substrate areas to improve device performance |
US7479431B2 (en) * | 2004-12-17 | 2009-01-20 | Intel Corporation | Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain |
US7465972B2 (en) * | 2005-01-21 | 2008-12-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | High performance CMOS device design |
US7221006B2 (en) * | 2005-04-20 | 2007-05-22 | Freescale Semiconductor, Inc. | GeSOI transistor with low junction current and low junction capacitance and method for making the same |
US7727845B2 (en) * | 2005-10-24 | 2010-06-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Ultra shallow junction formation by solid phase diffusion |
US7947546B2 (en) * | 2005-10-31 | 2011-05-24 | Chartered Semiconductor Manufacturing, Ltd. | Implant damage control by in-situ C doping during SiGe epitaxy for device applications |
JP5100137B2 (ja) * | 2007-01-26 | 2012-12-19 | 株式会社東芝 | 半導体装置の製造方法および半導体装置 |
-
2006
- 2006-08-09 US US11/502,132 patent/US7947546B2/en active Active
- 2006-09-15 SG SG2012078986A patent/SG185924A1/en unknown
- 2006-09-15 SG SG200902889-5A patent/SG152275A1/en unknown
- 2006-09-15 SG SG200606439-8A patent/SG131844A1/en unknown
- 2006-09-15 SG SG2014013031A patent/SG2014013031A/en unknown
- 2006-10-30 CN CN200610142730.0A patent/CN1979787B/zh not_active Expired - Fee Related
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2011
- 2011-05-23 US US13/113,107 patent/US8652892B2/en active Active
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2014
- 2014-02-17 US US14/182,242 patent/US8790980B2/en active Active
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CN1979787A (zh) | 2007-06-13 |
SG185924A1 (en) | 2012-12-28 |
US7947546B2 (en) | 2011-05-24 |
US8652892B2 (en) | 2014-02-18 |
US8790980B2 (en) | 2014-07-29 |
SG2014013031A (en) | 2014-10-30 |
US20110223737A1 (en) | 2011-09-15 |
US20070096149A1 (en) | 2007-05-03 |
CN1979787B (zh) | 2011-03-23 |
SG131844A1 (en) | 2007-05-28 |
US20140159113A1 (en) | 2014-06-12 |
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