SG136874A1 - Bonded wafer and method of producing the same - Google Patents
Bonded wafer and method of producing the sameInfo
- Publication number
- SG136874A1 SG136874A1 SG200702450-8A SG2007024508A SG136874A1 SG 136874 A1 SG136874 A1 SG 136874A1 SG 2007024508 A SG2007024508 A SG 2007024508A SG 136874 A1 SG136874 A1 SG 136874A1
- Authority
- SG
- Singapore
- Prior art keywords
- producing
- same
- bonded wafer
- wafer
- bonded
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)
- Polishing Bodies And Polishing Tools (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006112460A JP5028845B2 (ja) | 2006-04-14 | 2006-04-14 | 貼り合わせウェーハ及びその製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG136874A1 true SG136874A1 (en) | 2007-11-29 |
Family
ID=38266732
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG200702450-8A SG136874A1 (en) | 2006-04-14 | 2007-04-02 | Bonded wafer and method of producing the same |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7718507B2 (de) |
| EP (1) | EP1845557B1 (de) |
| JP (1) | JP5028845B2 (de) |
| SG (1) | SG136874A1 (de) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4853042B2 (ja) * | 2006-02-17 | 2012-01-11 | 株式会社Ｓｕｍｃｏ | ウェーハおよびその製造方法 |
| US8748288B2 (en) * | 2010-02-05 | 2014-06-10 | International Business Machines Corporation | Bonded structure with enhanced adhesion strength |
| FR2957189B1 (fr) * | 2010-03-02 | 2012-04-27 | Soitec Silicon On Insulator | Procede de realisation d'une structure multicouche avec detourage post meulage. |
| FR2957716B1 (fr) | 2010-03-18 | 2012-10-05 | Soitec Silicon On Insulator | Procede de finition d'un substrat de type semi-conducteur sur isolant |
| EP2597670B1 (de) * | 2010-03-31 | 2016-03-30 | EV Group E. Thallner GmbH | Verfahren zum permanenten Verbinden zweier Metalloberflächen |
| US20140127857A1 (en) * | 2012-11-07 | 2014-05-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Carrier Wafers, Methods of Manufacture Thereof, and Packaging Methods |
| JP7089905B2 (ja) * | 2018-03-02 | 2022-06-23 | 富士紡ホールディングス株式会社 | 研磨パッド |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6427999A (en) * | 1987-07-23 | 1989-01-30 | Nobuko Nishida | Divination judgment telephone card and divination judgment system using said card |
| JP2598703B2 (ja) * | 1989-07-14 | 1997-04-09 | わかもと製薬株式会社 | ブチル３′―（１ｈ―テトラゾール―５―イル）オキサニレートの製造法 |
| JPH0719737B2 (ja) | 1990-02-28 | 1995-03-06 | 信越半導体株式会社 | Ｓ０１基板の製造方法 |
| JP3352896B2 (ja) | 1997-01-17 | 2002-12-03 | 信越半導体株式会社 | 貼り合わせ基板の作製方法 |
| US6022268A (en) * | 1998-04-03 | 2000-02-08 | Rodel Holdings Inc. | Polishing pads and methods relating thereto |
| JP3496925B2 (ja) | 1998-02-04 | 2004-02-16 | キヤノン株式会社 | 半導体基板とその製造方法 |
| US6217427B1 (en) * | 1999-04-06 | 2001-04-17 | Agere Systems Inc. | Mobius strip belt for linear CMP tools |
| WO2001027999A1 (fr) | 1999-10-14 | 2001-04-19 | Shin-Etsu Handotai Co., Ltd. | Procede de production de tranches collees et tranche collee |
| JP3632531B2 (ja) | 1999-11-17 | 2005-03-23 | 株式会社デンソー | 半導体基板の製造方法 |
| JP2002299290A (ja) * | 2001-03-30 | 2002-10-11 | Mitsubishi Materials Silicon Corp | 半導体ウェーハの製造方法 |
| JP4304879B2 (ja) * | 2001-04-06 | 2009-07-29 | 信越半導体株式会社 | 水素イオンまたは希ガスイオンの注入量の決定方法 |
| FR2839385B1 (fr) | 2002-05-02 | 2004-07-23 | Soitec Silicon On Insulator | Procede de decollement de couches de materiau |
| JP4556158B2 (ja) * | 2002-10-22 | 2010-10-06 | 株式会社Ｓｕｍｃｏ | 貼り合わせｓｏｉ基板の製造方法および半導体装置 |
| JP4509488B2 (ja) * | 2003-04-02 | 2010-07-21 | 株式会社Ｓｕｍｃｏ | 貼り合わせ基板の製造方法 |
| JP2004337992A (ja) * | 2003-05-13 | 2004-12-02 | Disco Abrasive Syst Ltd | 固定砥粒研磨パッド，及び固定砥粒研磨パッドを使用したシリコンウェハの研磨方法 |
| JP2005038978A (ja) * | 2003-07-18 | 2005-02-10 | Speedfam Co Ltd | 半導体ウェハの平坦面外周部研磨装置 |
| JP2006093655A (ja) * | 2004-08-24 | 2006-04-06 | Disco Abrasive Syst Ltd | 研磨液，及び研磨装置 |
| DE102005039896A1 (de) * | 2004-08-24 | 2006-03-02 | Disco Corporation | Polierflüssigkeit |
-
2006
- 2006-04-14 JP JP2006112460A patent/JP5028845B2/ja active Active
-
2007
- 2007-03-08 US US11/716,341 patent/US7718507B2/en active Active
- 2007-03-09 EP EP07004957.2A patent/EP1845557B1/de active Active
- 2007-04-02 SG SG200702450-8A patent/SG136874A1/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| JP2007287879A (ja) | 2007-11-01 |
| EP1845557B1 (de) | 2016-07-27 |
| EP1845557A2 (de) | 2007-10-17 |
| US7718507B2 (en) | 2010-05-18 |
| EP1845557A3 (de) | 2008-12-24 |
| US20070243694A1 (en) | 2007-10-18 |
| JP5028845B2 (ja) | 2012-09-19 |
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