SG135016A1 - Improved magnetic ram and array architecture using a two transistor, one mtj cell - Google Patents

Improved magnetic ram and array architecture using a two transistor, one mtj cell

Info

Publication number
SG135016A1
SG135016A1 SG200400421-4A SG2004004214A SG135016A1 SG 135016 A1 SG135016 A1 SG 135016A1 SG 2004004214 A SG2004004214 A SG 2004004214A SG 135016 A1 SG135016 A1 SG 135016A1
Authority
SG
Singapore
Prior art keywords
transistor
magnetic ram
array architecture
mtj cell
improved magnetic
Prior art date
Application number
SG200400421-4A
Other languages
English (en)
Inventor
Wen-Chin Lin
Denny D Tang
Yu Der Chih
Original Assignee
Taiwan Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg filed Critical Taiwan Semiconductor Mfg
Publication of SG135016A1 publication Critical patent/SG135016A1/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Hall/Mr Elements (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Memories (AREA)
SG200400421-4A 2003-02-13 2004-01-29 Improved magnetic ram and array architecture using a two transistor, one mtj cell SG135016A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/366,499 US7173846B2 (en) 2003-02-13 2003-02-13 Magnetic RAM and array architecture using a two transistor, one MTJ cell

Publications (1)

Publication Number Publication Date
SG135016A1 true SG135016A1 (en) 2007-09-28

Family

ID=32849763

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200400421-4A SG135016A1 (en) 2003-02-13 2004-01-29 Improved magnetic ram and array architecture using a two transistor, one mtj cell

Country Status (4)

Country Link
US (1) US7173846B2 (zh)
CN (1) CN100378864C (zh)
SG (1) SG135016A1 (zh)
TW (1) TWI225254B (zh)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7154798B2 (en) * 2004-04-27 2006-12-26 Taiwan Semiconductor Manufacturing Company, Ltd. MRAM arrays and methods for writing and reading magnetic memory devices
US7339818B2 (en) * 2004-06-04 2008-03-04 Micron Technology, Inc. Spintronic devices with integrated transistors
US7289350B2 (en) * 2005-04-05 2007-10-30 Infineon Technologies Ag Electronic device with a memory cell
US7289356B2 (en) * 2005-06-08 2007-10-30 Grandis, Inc. Fast magnetic memory devices utilizing spin transfer and magnetic elements used therein
TWI449040B (zh) * 2006-10-06 2014-08-11 Crocus Technology Sa 用於提供內容可定址的磁阻式隨機存取記憶體單元之系統及方法
ATE538474T1 (de) * 2008-04-07 2012-01-15 Crocus Technology Sa System und verfahren zum schreiben von daten auf magnetoresistive direktzugriffsspeicherzellen
EP2124228B1 (en) * 2008-05-20 2014-03-05 Crocus Technology Magnetic random access memory with an elliptical junction
US8031519B2 (en) * 2008-06-18 2011-10-04 Crocus Technology S.A. Shared line magnetic random access memory cells
JP5432762B2 (ja) * 2009-02-19 2014-03-05 クロッカス・テクノロジー・ソシエテ・アノニム アクティブストラップ式磁気ランダムアクセスメモリの記憶素子
US8644055B2 (en) 2010-12-09 2014-02-04 Infineon Technologies Ag Nonvolatile memory with enhanced efficiency to address asymetric NVM cells
US20130258750A1 (en) * 2012-03-30 2013-10-03 International Business Machines Corporation Dual-cell mtj structure with individual access and logical combination ability
US9224447B2 (en) * 2013-04-24 2015-12-29 Regents Of The University Of Minnesota General structure for computational random access memory (CRAM)
US9165610B1 (en) * 2014-06-30 2015-10-20 Globalfoundries Singapore Pte. Ltd. Non-volatile memory cell arrays and methods of fabricating semiconductor devices
US9461094B2 (en) 2014-07-17 2016-10-04 Qualcomm Incorporated Switching film structure for magnetic random access memory (MRAM) cell
KR20170066355A (ko) 2014-09-26 2017-06-14 휴렛 팩커드 엔터프라이즈 디벨롭먼트 엘피 비트 셀의 어레이
US9589615B2 (en) * 2015-06-25 2017-03-07 Intel Corporation Digitally trimmable integrated resistors including resistive memory elements
CN106558333B (zh) * 2015-09-29 2018-11-09 中国科学院物理研究所 包括环形磁性隧道结的自旋转移力矩磁随机存取存储器
US9734880B1 (en) * 2016-04-01 2017-08-15 Intel Corporation Apparatuses, methods, and systems for stochastic memory circuits using magnetic tunnel junctions
US10224368B2 (en) * 2017-06-30 2019-03-05 Qualcomm Incorporated Voltage-switched magneto-resistive random access memory (MRAM) employing separate read operation circuit paths from a shared spin torque write operation circuit path
KR102506447B1 (ko) * 2018-04-19 2023-03-06 삼성전자주식회사 메모리 셀 어레이를 포함하는 저항성 메모리 장치 및 이를 포함하는 시스템
US10483457B1 (en) * 2018-08-14 2019-11-19 Qualcomm Incorporated Differential spin orbit torque magnetic random access memory (SOT-MRAM) cell structure and array
KR102663649B1 (ko) 2018-09-14 2024-05-08 삼성전자주식회사 쓰기 방향에 따른 비대칭 쓰기 동작을 실행하도록 구성되는 메모리 장치
US10878928B2 (en) * 2018-09-21 2020-12-29 Taiwan Semiconductor Manufacturing Co., Ltd. One-time-programmable (OTP) implementation using magnetic junctions
US11176979B2 (en) 2019-02-28 2021-11-16 Regents Of The University Of Minnesota Computational random access memory (CRAM) based on spin-orbit torque devices
US11145349B1 (en) * 2020-09-28 2021-10-12 Globalfoundries U.S. Inc. Physically unclonable function architecture including memory cells with parallel-connected access transistors and common write wordlines

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6034887A (en) * 1998-08-05 2000-03-07 International Business Machines Corporation Non-volatile magnetic memory cell and devices
US20020036919A1 (en) * 2000-08-17 2002-03-28 Daughton James M. Circuit selection of magnetic memory cells and related cell structures

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6097626A (en) * 1999-07-28 2000-08-01 Hewlett-Packard Company MRAM device using magnetic field bias to suppress inadvertent switching of half-selected memory cells
US6166948A (en) * 1999-09-03 2000-12-26 International Business Machines Corporation Magnetic memory array with magnetic tunnel junction memory cells having flux-closed free layers
DE10032271C2 (de) * 2000-07-03 2002-08-01 Infineon Technologies Ag MRAM-Anordnung
DE10041378C1 (de) * 2000-08-23 2002-05-16 Infineon Technologies Ag MRAM-Anordnung
US6331943B1 (en) 2000-08-28 2001-12-18 Motorola, Inc. MTJ MRAM series-parallel architecture
JP4149647B2 (ja) * 2000-09-28 2008-09-10 株式会社東芝 半導体記憶装置及びその製造方法
US6335890B1 (en) 2000-11-01 2002-01-01 International Business Machines Corporation Segmented write line architecture for writing magnetic random access memories
US6418046B1 (en) 2001-01-30 2002-07-09 Motorola, Inc. MRAM architecture and system
US6304477B1 (en) 2001-01-31 2001-10-16 Motorola, Inc. Content addressable magnetic random access memory
KR100450794B1 (ko) * 2001-12-13 2004-10-01 삼성전자주식회사 마그네틱 랜덤 엑세스 메모리 및 그 작동 방법
US6791865B2 (en) * 2002-09-03 2004-09-14 Hewlett-Packard Development Company, L.P. Memory device capable of calibration and calibration methods therefor
US6909628B2 (en) * 2003-02-13 2005-06-21 Taiwan Semiconductor Manufacturing Company, Ltd. High density magnetic RAM and array architecture using a one transistor, one diode, and one MTJ cell

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6034887A (en) * 1998-08-05 2000-03-07 International Business Machines Corporation Non-volatile magnetic memory cell and devices
US20020036919A1 (en) * 2000-08-17 2002-03-28 Daughton James M. Circuit selection of magnetic memory cells and related cell structures

Also Published As

Publication number Publication date
CN1521761A (zh) 2004-08-18
US7173846B2 (en) 2007-02-06
TWI225254B (en) 2004-12-11
CN100378864C (zh) 2008-04-02
TW200415646A (en) 2004-08-16
US20040160809A1 (en) 2004-08-19

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