SG113422A1 - A method to form an air-gap under the edges of a gate electrode by using disposable spacer/liner - Google Patents

A method to form an air-gap under the edges of a gate electrode by using disposable spacer/liner

Info

Publication number
SG113422A1
SG113422A1 SG200203418A SG200203418A SG113422A1 SG 113422 A1 SG113422 A1 SG 113422A1 SG 200203418 A SG200203418 A SG 200203418A SG 200203418 A SG200203418 A SG 200203418A SG 113422 A1 SG113422 A1 SG 113422A1
Authority
SG
Singapore
Prior art keywords
liner
edges
air
gate electrode
gap under
Prior art date
Application number
SG200203418A
Other languages
English (en)
Inventor
Ramachandramurthy Pr Yelehanka
Zheng Jia-Zhen
Chan Lap
Quek Elgin
Sundaresan Ravi
Pan Yang
Yong Meng Lee James
Leung Ying-Keung
Original Assignee
Chartered Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chartered Semiconductor Mfg filed Critical Chartered Semiconductor Mfg
Publication of SG113422A1 publication Critical patent/SG113422A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/764—Air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823468—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4983—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
SG200203418A 2001-07-19 2002-06-10 A method to form an air-gap under the edges of a gate electrode by using disposable spacer/liner SG113422A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/907,651 US6468877B1 (en) 2001-07-19 2001-07-19 Method to form an air-gap under the edges of a gate electrode by using disposable spacer/liner

Publications (1)

Publication Number Publication Date
SG113422A1 true SG113422A1 (en) 2005-08-29

Family

ID=25424421

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200203418A SG113422A1 (en) 2001-07-19 2002-06-10 A method to form an air-gap under the edges of a gate electrode by using disposable spacer/liner

Country Status (4)

Country Link
US (1) US6468877B1 (de)
EP (1) EP1278247A3 (de)
JP (1) JP2003078131A (de)
SG (1) SG113422A1 (de)

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DE10228571A1 (de) * 2002-06-26 2004-01-22 Infineon Technologies Ag Herstellungsverfahren für eine Halbleiterstruktur mit einer Mehrzahl von Gatestapeln auf einem Halbleitersubstrat und entsprechende Halbleiterstruktur
US20040038489A1 (en) * 2002-08-21 2004-02-26 Clevenger Lawrence A. Method to improve performance of microelectronic circuits
JP2004095888A (ja) * 2002-08-30 2004-03-25 Fujitsu Ltd 半導体装置及びその製造方法
EP1480266A3 (de) * 2003-05-20 2006-03-15 STMicroelectronics S.A. Verfahren zur Herstellung integrierten Schaltungen mit gestapelten Bauteilen und entsprechende integrierte Schaltungen.
DE102004052388B4 (de) * 2004-10-28 2016-05-25 Infineon Technologies Ag Halbleiterbauelement sowie zugehöriges Herstellungsverfahren
US7132342B1 (en) * 2004-12-03 2006-11-07 National Semiconductor Corporation Method of reducing fringing capacitance in a MOSFET
US8436410B2 (en) * 2005-10-31 2013-05-07 Samsung Electronics Co., Ltd. Semiconductor devices comprising a plurality of gate structures
KR100784860B1 (ko) 2005-10-31 2007-12-14 삼성전자주식회사 비휘발성 메모리 장치 및 그 제조 방법
KR101221951B1 (ko) * 2005-12-28 2013-01-15 엘지디스플레이 주식회사 액정표시장치용 어레이 기판 및 그 제조방법
US20080040697A1 (en) * 2006-06-21 2008-02-14 International Business Machines Corporation Design Structure Incorporating Semiconductor Device Structures with Voids
US7741663B2 (en) * 2008-10-24 2010-06-22 Globalfoundries Inc. Air gap spacer formation
DE102010042229B4 (de) * 2010-10-08 2012-10-25 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren zum Steigern der Integrität eines Gatestapels mit großem ε durch Erzeugen einer gesteuerten Unterhöhlung auf der Grundlage einer Nasschemie und mit den Verfahren hergestellter Transistor
US8390079B2 (en) 2010-10-28 2013-03-05 International Business Machines Corporation Sealed air gap for semiconductor chip
US8564027B2 (en) 2012-01-27 2013-10-22 International Business Machines Corporation Nano-devices formed with suspended graphene membrane
KR101887414B1 (ko) * 2012-03-20 2018-08-10 삼성전자 주식회사 반도체 장치 및 그 제조 방법
CN102623351B (zh) * 2012-04-16 2014-11-26 清华大学 一种增强隧道穿透场效应晶体管的形成方法
KR20140094917A (ko) 2013-01-23 2014-07-31 삼성전자주식회사 반도체 장치 및 그 제조 방법
KR20160148795A (ko) * 2015-06-16 2016-12-27 삼성전자주식회사 반도체 소자 및 이의 제조 방법
US9589833B1 (en) 2015-09-10 2017-03-07 International Business Machines Corporation Preventing leakage inside air-gap spacer during contact formation
US9536982B1 (en) 2015-11-03 2017-01-03 International Business Machines Corporation Etch stop for airgap protection
US9508810B1 (en) * 2015-11-16 2016-11-29 International Business Machines Corporation FET with air gap spacer for improved overlap capacitance
US9953876B1 (en) * 2016-09-30 2018-04-24 Globalfoundries Inc. Method of forming a semiconductor device structure and semiconductor device structure
US10741654B2 (en) 2016-11-17 2020-08-11 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and forming method thereof
US10269983B2 (en) 2017-05-09 2019-04-23 Globalfoundries Inc. Stacked nanosheet field-effect transistor with air gap spacers
US10411114B2 (en) 2017-12-21 2019-09-10 International Business Machines Corporation Air gap spacer with wrap-around etch stop layer under gate spacer
CN115910786A (zh) * 2021-09-30 2023-04-04 联华电子股份有限公司 半导体元件及其制作方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5770507A (en) * 1996-11-09 1998-06-23 Winbond Electronics Corp. Method for forming a gate-side air-gap structure in a salicide process
US5864160A (en) * 1996-05-24 1999-01-26 Advanced Micro Devices, Inc. Transistor device with reduced hot carrier injection effects
US5869374A (en) * 1998-04-22 1999-02-09 Texas Instruments-Acer Incorporated Method to form mosfet with an inverse T-shaped air-gap gate structure

Family Cites Families (14)

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Publication number Priority date Publication date Assignee Title
JP3413823B2 (ja) * 1996-03-07 2003-06-09 日本電気株式会社 半導体装置及びその製造方法
KR100246349B1 (ko) * 1997-05-24 2000-03-15 김영환 모스페트 소자 및 그 제조방법
JPH1117166A (ja) * 1997-06-23 1999-01-22 Nec Corp 半導体装置の製造方法
TW393693B (en) 1997-07-26 2000-06-11 United Microelectronics Corp MOS device with air-gap spacers and its manufacturing method
KR100236101B1 (ko) * 1997-09-29 1999-12-15 김영환 반도체 소자 및 제조 방법
US5915182A (en) * 1997-10-17 1999-06-22 Texas Instruments - Acer Incorporated MOSFET with self-aligned silicidation and gate-side air-gap structure
US6495900B1 (en) * 1997-11-12 2002-12-17 Micron Technology, Inc. Insulator for electrical structure
US6180988B1 (en) * 1997-12-04 2001-01-30 Texas Instruments-Acer Incorporated Self-aligned silicided MOSFETS with a graded S/D junction and gate-side air-gap structure
US5972761A (en) * 1997-12-29 1999-10-26 Texas Instruments - Acer Incorporated Method of making MOS transistors with a gate-side air-gap structure and an extension ultra-shallow S/D junction
TW392357B (en) 1998-02-10 2000-06-01 United Microelectronics Corp Manufacturing method for semiconductor device and structure manufactured by the same
US6001695A (en) * 1998-03-02 1999-12-14 Texas Instruments - Acer Incorporated Method to form ultra-short channel MOSFET with a gate-side airgap structure
US5998288A (en) 1998-04-17 1999-12-07 Advanced Micro Devices, Inc. Ultra thin spacers formed laterally adjacent a gate conductor recessed below the upper surface of a substrate
US6127712A (en) * 1998-05-22 2000-10-03 Texas Instruments--Acer Incorporated Mosfet with buried contact and air-gap gate structure
US6124177A (en) * 1999-08-13 2000-09-26 Taiwan Semiconductor Manufacturing Company Method for making deep sub-micron mosfet structures having improved electrical characteristics

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5864160A (en) * 1996-05-24 1999-01-26 Advanced Micro Devices, Inc. Transistor device with reduced hot carrier injection effects
US5770507A (en) * 1996-11-09 1998-06-23 Winbond Electronics Corp. Method for forming a gate-side air-gap structure in a salicide process
US5869374A (en) * 1998-04-22 1999-02-09 Texas Instruments-Acer Incorporated Method to form mosfet with an inverse T-shaped air-gap gate structure

Also Published As

Publication number Publication date
JP2003078131A (ja) 2003-03-14
EP1278247A3 (de) 2006-06-14
US6468877B1 (en) 2002-10-22
EP1278247A2 (de) 2003-01-22

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