SG11202112760XA - Multi-chip module hybrid integrated circuit with multiple power zones that provide cold spare support - Google Patents
Multi-chip module hybrid integrated circuit with multiple power zones that provide cold spare supportInfo
- Publication number
- SG11202112760XA SG11202112760XA SG11202112760XA SG11202112760XA SG11202112760XA SG 11202112760X A SG11202112760X A SG 11202112760XA SG 11202112760X A SG11202112760X A SG 11202112760XA SG 11202112760X A SG11202112760X A SG 11202112760XA SG 11202112760X A SG11202112760X A SG 11202112760XA
- Authority
- SG
- Singapore
- Prior art keywords
- integrated circuit
- chip module
- multiple power
- hybrid integrated
- provide cold
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/165—Containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5382—Adaptable interconnections, e.g. for engineering changes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/76—Apparatus for connecting with build-up interconnects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Geometry (AREA)
- Semiconductor Integrated Circuits (AREA)
- Dc-Dc Converters (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/422,072 US10854586B1 (en) | 2019-05-24 | 2019-05-24 | Multi-chip module hybrid integrated circuit with multiple power zones that provide cold spare support |
PCT/US2020/033592 WO2020242826A1 (en) | 2019-05-24 | 2020-05-19 | Multi-chip module hybrid integrated circuit with multiple power zones that provide cold spare support |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11202112760XA true SG11202112760XA (en) | 2021-12-30 |
Family
ID=73456187
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11202112760XA SG11202112760XA (en) | 2019-05-24 | 2020-05-19 | Multi-chip module hybrid integrated circuit with multiple power zones that provide cold spare support |
Country Status (6)
Country | Link |
---|---|
US (1) | US10854586B1 (ja) |
EP (1) | EP3977510A4 (ja) |
JP (1) | JP7159489B2 (ja) |
KR (1) | KR102447242B1 (ja) |
SG (1) | SG11202112760XA (ja) |
WO (1) | WO2020242826A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20240069075A1 (en) * | 2021-01-06 | 2024-02-29 | Intel Corporation | Device, method and system to sense voltages at sample points of respective interconnect structures |
US11342915B1 (en) | 2021-02-11 | 2022-05-24 | Bae Systems Information And Electronic Systems Integration Inc. | Cold spare tolerant radiation hardened generic level shifter circuit |
US11855043B1 (en) | 2021-05-06 | 2023-12-26 | Eliyan Corporation | Complex system-in-package architectures leveraging high-bandwidth long-reach die-to-die connectivity over package substrates |
US11960339B2 (en) * | 2021-07-09 | 2024-04-16 | Advanced Micro Devices, Inc. | Multi-die stacked power delivery |
US11842986B1 (en) | 2021-11-25 | 2023-12-12 | Eliyan Corporation | Multi-chip module (MCM) with interface adapter circuitry |
US11841815B1 (en) * | 2021-12-31 | 2023-12-12 | Eliyan Corporation | Chiplet gearbox for low-cost multi-chip module applications |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4130892A (en) | 1977-01-03 | 1978-12-19 | Rockwell International Corporation | Radiation hard memory cell and array thereof |
NL8903033A (nl) | 1989-12-11 | 1991-07-01 | Philips Nv | Alfa-straling ongevoelige 6 transistor cmos geheugencel. |
US5117129A (en) * | 1990-10-16 | 1992-05-26 | International Business Machines Corporation | Cmos off chip driver for fault tolerant cold sparing |
US5438437A (en) | 1991-10-17 | 1995-08-01 | Konica Corporation | Image forming apparatus with exposure, size, and position correction for pixels |
US5629634A (en) * | 1995-08-21 | 1997-05-13 | International Business Machines Corporation | Low-power, tristate, off-chip driver circuit |
US5867039A (en) * | 1996-05-17 | 1999-02-02 | Honeywell Inc. | CMOS output driver with p-channel substrate tracking for cold spare capability |
KR100469798B1 (ko) * | 1996-05-17 | 2005-05-25 | 하니웰 인코포레이티드 | 저온예비능력을추구하는p채널기판을구비한cmos출력구동기 |
US6111780A (en) | 1998-06-05 | 2000-08-29 | Lockheed Martin Corporation | Radiation hardened six transistor random access memory and memory device |
JP2002076143A (ja) | 2000-08-31 | 2002-03-15 | Mitsubishi Electric Corp | 半導体装置 |
US20030020160A1 (en) | 2001-07-25 | 2003-01-30 | Deeney Jeffrey L. | Semiconductor device die and package having improved heat dissipation capability |
US6909659B2 (en) * | 2001-08-30 | 2005-06-21 | Micron Technology, Inc. | Zero power chip standby mode |
US6957353B2 (en) * | 2001-10-31 | 2005-10-18 | Hewlett-Packard Development Company, L.P. | System and method for providing minimal power-consuming redundant computing hardware for distributed services |
US7239177B2 (en) * | 2004-06-09 | 2007-07-03 | Bae Systems Information And Electronic Systems Integration Inc. | High voltage tolerant off chip driver circuit |
US7408410B2 (en) | 2006-06-02 | 2008-08-05 | Bae Systems Information And Electronic Systems Integration Inc. | Apparatus for biasing a complementary metal-oxide semiconductor differential amplifier |
US7673186B2 (en) | 2006-06-07 | 2010-03-02 | Maxwell Technologies, Inc. | Apparatus and method for cold sparing in multi-board computer systems |
US7468904B2 (en) | 2007-02-23 | 2008-12-23 | Bae Systems Information And Electronic Systems Integration Inc. | Apparatus for hardening a static random access memory cell from single event upsets |
US8189367B1 (en) | 2007-02-23 | 2012-05-29 | Bae Systems Information And Electronic Systems Integration Inc. | Single event upset hardened static random access memory cell |
US7999454B2 (en) | 2008-08-14 | 2011-08-16 | Global Oled Technology Llc | OLED device with embedded chip driving |
JP5516449B2 (ja) * | 2011-02-14 | 2014-06-11 | 富士通セミコンダクター株式会社 | 出力回路、システム、及び出力回路の制御方法 |
US8587501B2 (en) | 2011-02-17 | 2013-11-19 | Global Oled Technology Llc | Electroluminescent display device with optically communicating chiplets |
US8975920B2 (en) | 2011-08-12 | 2015-03-10 | Bae Systems Information And Electronic Systems Integration Inc. | Programmable transceiver circuit |
US8778755B2 (en) | 2012-07-12 | 2014-07-15 | Bae Systems Information And Electronic Systems Integration Inc. | Method for fabricating a metal-insulator-metal capacitor |
US20180102776A1 (en) * | 2016-10-07 | 2018-04-12 | Altera Corporation | Methods and apparatus for managing application-specific power gating on multichip packages |
US10135443B1 (en) * | 2017-08-03 | 2018-11-20 | Bae Systems Information And Electronic Systems Integration Inc. | Extended voltage range coldspare tolerant off chip driver |
US10685947B2 (en) | 2018-01-12 | 2020-06-16 | Intel Corporation | Distributed semiconductor die and package architecture |
US10700046B2 (en) | 2018-08-07 | 2020-06-30 | Bae Systems Information And Electronic Systems Integration Inc. | Multi-chip hybrid system-in-package for providing interoperability and other enhanced features to high complexity integrated circuits |
-
2019
- 2019-05-24 US US16/422,072 patent/US10854586B1/en active Active
-
2020
- 2020-05-19 WO PCT/US2020/033592 patent/WO2020242826A1/en unknown
- 2020-05-19 KR KR1020217041305A patent/KR102447242B1/ko active IP Right Grant
- 2020-05-19 SG SG11202112760XA patent/SG11202112760XA/en unknown
- 2020-05-19 EP EP20815191.0A patent/EP3977510A4/en active Pending
- 2020-05-19 JP JP2021569928A patent/JP7159489B2/ja active Active
Also Published As
Publication number | Publication date |
---|---|
JP7159489B2 (ja) | 2022-10-24 |
WO2020242826A1 (en) | 2020-12-03 |
JP2022525692A (ja) | 2022-05-18 |
EP3977510A4 (en) | 2023-07-19 |
EP3977510A1 (en) | 2022-04-06 |
US20200373286A1 (en) | 2020-11-26 |
US10854586B1 (en) | 2020-12-01 |
KR20220003110A (ko) | 2022-01-07 |
KR102447242B1 (ko) | 2022-09-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG11202112760XA (en) | Multi-chip module hybrid integrated circuit with multiple power zones that provide cold spare support | |
PL3654444T3 (pl) | Moduł akumulatorowy zintegrowany ze strukturą chłodzącą i mocującą ogniwo akumulatorowe oraz zawierający go pakiet akumulatorowy | |
EP3595001A4 (en) | SUBSTRATE FOR POWER MODULE WITH HEAT SINK | |
EP3771084A4 (en) | DUAL SIDED COOLING TYPE POWER MODULE AND ITS MANUFACTURING PROCESS | |
EP2980844A4 (en) | SUBSTRATE FOR POWER MODULES, SUBSTRATE HAVING THERMAL DISSIPATOR FOR POWER MODULES, AND POWER MODULE | |
GB2496481B (en) | Cooling system | |
EP3136431A4 (en) | Substrate for power modules, substrate with heat sink for power modules and power module with heat sink | |
EP3361501A4 (en) | SUBSTRATE FOR POWER MODULE WITH COOLING BODY AND POWER MODULE | |
EP3285291A4 (en) | Bonded body, substrate for power module with heat sink, heat sink, method for producing bonded body, method for producing substrate for power module with heat sink, and method for producing heat sink | |
EP3285292A4 (en) | BONDED BODY, SUBSTRATE FOR ELECTRIC MODULE WITH HEAT DISSIPATOR, HEAT DISSIPATOR, METHOD FOR MANUFACTURING BONDED BODY, METHOD FOR MANUFACTURING SUBSTRATE FOR ELECTRIC MODULE WITH HEAT DISSIPATOR, AND METHOD FOR MANUFACTURING HEAT DISSIPATOR | |
EP3716392A4 (en) | BATTERY MODULE HAVING AN IMPROVED COOLING STRUCTURE | |
IN2015DN01338A (ja) | ||
EP3745453A4 (en) | SUBSTRATE FOR POWER MODULE WITH HEAT SINK AND POWER MODULE | |
EP3351073A4 (en) | Base plate for heat sink as well as heat sink and igbt module having the same | |
EP3790043A4 (en) | CIRCUIT MODULE AND POWER SUPPLY CHIP MODULE | |
IL268123A (en) | Solar models with solar sub-cells that are connected by matrix connections | |
EP3633722A4 (en) | POWER SEMICONDUCTOR MODULE | |
EP3595003A4 (en) | POWER MODULE SUBSTRATE WITH HEAT SINK | |
GB2577259B (en) | Battery module coolant channels | |
HUE062188T2 (hu) | Akkumulátor modul továbbfejlesztett hûtéssel | |
EP4081882A4 (en) | EXTERNAL COOLING MODULE | |
GB2588510B (en) | Power distribution unit circuit and power distribution structure for integrated transceiver system | |
EP3659254A4 (en) | PHOTOVOLTAIC MODULE WITH DISTRIBUTED POWER CONVERTER CIRCUITS | |
EP4118681C0 (de) | Leistungshalbleitermodul mit zumindest einem leistungshalbleiterelement | |
GB2590548B (en) | Tool storage units with integrated power |