SG11202005642VA - Hardware-efficient fault-tolerant operations with superconducting circuits - Google Patents

Hardware-efficient fault-tolerant operations with superconducting circuits

Info

Publication number
SG11202005642VA
SG11202005642VA SG11202005642VA SG11202005642VA SG11202005642VA SG 11202005642V A SG11202005642V A SG 11202005642VA SG 11202005642V A SG11202005642V A SG 11202005642VA SG 11202005642V A SG11202005642V A SG 11202005642VA SG 11202005642V A SG11202005642V A SG 11202005642VA
Authority
SG
Singapore
Prior art keywords
hardware
superconducting circuits
efficient fault
tolerant operations
tolerant
Prior art date
Application number
SG11202005642VA
Other languages
English (en)
Inventor
Serge Rosenblum
Philip Reinhold
Liang Jiang
Steven Girvin
Luigi Frunzio
Michel Devoret
Robert Schoelkopf
Original Assignee
Univ Yale
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Yale filed Critical Univ Yale
Publication of SG11202005642VA publication Critical patent/SG11202005642VA/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/10—Junction-based devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/20—Models of quantum computing, e.g. quantum circuits or universal quantum computers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/70—Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Artificial Intelligence (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Nanotechnology (AREA)
  • Chemical & Material Sciences (AREA)
  • Quality & Reliability (AREA)
  • Computer Security & Cryptography (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Logic Circuits (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
SG11202005642VA 2018-01-05 2019-01-05 Hardware-efficient fault-tolerant operations with superconducting circuits SG11202005642VA (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201862613974P 2018-01-05 2018-01-05
US201862733316P 2018-09-19 2018-09-19
PCT/US2019/012441 WO2019156760A1 (fr) 2018-01-05 2019-01-05 Opérations à tolérance de pannes efficaces sur le plan matériel avec des circuits supraconducteurs

Publications (1)

Publication Number Publication Date
SG11202005642VA true SG11202005642VA (en) 2020-07-29

Family

ID=67549090

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202005642VA SG11202005642VA (en) 2018-01-05 2019-01-05 Hardware-efficient fault-tolerant operations with superconducting circuits

Country Status (8)

Country Link
US (1) US11449384B2 (fr)
EP (1) EP3735711A4 (fr)
JP (1) JP7382069B2 (fr)
KR (1) KR102632759B1 (fr)
CN (1) CN111542842A (fr)
CA (1) CA3085955A1 (fr)
SG (1) SG11202005642VA (fr)
WO (1) WO2019156760A1 (fr)

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US11737376B2 (en) 2017-12-11 2023-08-22 Yale University Superconducting nonlinear asymmetric inductive element and related systems and methods
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EP3414583A4 (fr) 2016-02-12 2019-10-30 Yale University Techniques de commande de systèmes quantiques et systèmes et procédés associés
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Also Published As

Publication number Publication date
KR20200103786A (ko) 2020-09-02
CN111542842A (zh) 2020-08-14
KR102632759B1 (ko) 2024-02-02
JP7382069B2 (ja) 2023-11-16
WO2019156760A8 (fr) 2019-10-31
US20200334104A1 (en) 2020-10-22
CA3085955A1 (fr) 2019-08-15
JP2021509748A (ja) 2021-04-01
EP3735711A1 (fr) 2020-11-11
EP3735711A4 (fr) 2021-10-06
WO2019156760A1 (fr) 2019-08-15
US11449384B2 (en) 2022-09-20

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