SG11201808294SA - Method for the vapour phase etching of a semiconductor wafer for trace metal analysis - Google Patents

Method for the vapour phase etching of a semiconductor wafer for trace metal analysis

Info

Publication number
SG11201808294SA
SG11201808294SA SG11201808294SA SG11201808294SA SG11201808294SA SG 11201808294S A SG11201808294S A SG 11201808294SA SG 11201808294S A SG11201808294S A SG 11201808294SA SG 11201808294S A SG11201808294S A SG 11201808294SA SG 11201808294S A SG11201808294S A SG 11201808294SA
Authority
SG
Singapore
Prior art keywords
semiconductor wafer
vapour phase
trace metal
phase etching
metal analysis
Prior art date
Application number
SG11201808294SA
Inventor
Franz Hölzlwimmer
Original Assignee
Siltronic Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siltronic Ag filed Critical Siltronic Ag
Publication of SG11201808294SA publication Critical patent/SG11201808294SA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N1/00Sampling; Preparing specimens for investigation
    • G01N1/28Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
    • G01N1/32Polishing; Etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02019Chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
SG11201808294SA 2016-04-05 2017-03-23 Method for the vapour phase etching of a semiconductor wafer for trace metal analysis SG11201808294SA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP16163874.7A EP3229262B1 (en) 2016-04-05 2016-04-05 Method for the vapour phase etching of a semiconductor wafer for trace metal analysis
PCT/EP2017/057006 WO2017174371A1 (en) 2016-04-05 2017-03-23 Method for the vapour phase etching of a semiconductor wafer for trace metal analysis

Publications (1)

Publication Number Publication Date
SG11201808294SA true SG11201808294SA (en) 2018-10-30

Family

ID=55697071

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201808294SA SG11201808294SA (en) 2016-04-05 2017-03-23 Method for the vapour phase etching of a semiconductor wafer for trace metal analysis

Country Status (9)

Country Link
US (1) US10861704B2 (en)
EP (1) EP3229262B1 (en)
JP (1) JP6754842B2 (en)
KR (2) KR102237913B1 (en)
CN (1) CN109075056B (en)
DK (1) DK3229262T3 (en)
SG (1) SG11201808294SA (en)
TW (1) TWI629383B (en)
WO (1) WO2017174371A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6819883B2 (en) * 2017-10-26 2021-01-27 信越半導体株式会社 Metal impurity analysis method for silicon wafers
JP7004221B2 (en) * 2018-11-16 2022-01-21 信越半導体株式会社 Silicon wafer etching method, etching equipment and impurity analysis method
JP7153361B2 (en) * 2020-04-18 2022-10-14 有限会社Nas技研 Bulk etching method and bulk etching apparatus
CN112133649A (en) * 2020-09-21 2020-12-25 南通大学 Uniform high-temperature corrosion device and corrosion method for large-size wafer
CN117367924A (en) * 2022-06-29 2024-01-09 江苏鲁汶仪器股份有限公司 Metal contamination collection system and metal contamination collection method
CN117723365A (en) * 2022-09-09 2024-03-19 无锡华瑛微电子技术有限公司 Semiconductor processing apparatus and method
CN117168942A (en) * 2023-11-01 2023-12-05 山东有研艾斯半导体材料有限公司 Sampling method for detecting metal on surface of silicon wafer

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1544281C3 (en) 1966-03-04 1975-04-03 Siemens Ag, 1000 Berlin Und 8000 Muenchen Process for doping silicon semiconductor material
GB1334796A (en) 1970-11-19 1973-10-24 Tokyo Shibaura Electric Co Vapour-phase reaction apparatus
WO1992022084A1 (en) * 1991-05-21 1992-12-10 Advantage Production Technology, Inc. Organic preclean for improving vapor phase wafer etch uniformity
JPH08316162A (en) * 1995-05-12 1996-11-29 Hitachi Ltd Semiconductor producing apparatus
JPH08330271A (en) 1995-06-02 1996-12-13 Shin Etsu Handotai Co Ltd Method and device for etching surface of silicon wafer
EP0782177A3 (en) * 1995-12-28 1997-07-30 Texas Instruments Incorporated Improvements in or relating to semiconductors
US7404863B2 (en) * 1997-05-09 2008-07-29 Semitool, Inc. Methods of thinning a silicon wafer using HF and ozone
TW380284B (en) 1998-09-09 2000-01-21 Promos Technologies Inc Method for improving etching uniformity during a wet etching process
JP2000340516A (en) * 1999-05-26 2000-12-08 Sony Corp Thermal treatment apparatus
KR20010018821A (en) 1999-08-23 2001-03-15 윤종용 Dynamic dry etching apparatus and method of dynamic dry etching using the same
US6517632B2 (en) 2000-01-17 2003-02-11 Toshiba Ceramics Co., Ltd. Method of fabricating a single crystal ingot and method of fabricating a silicon wafer
EP1983560A2 (en) 2001-07-10 2008-10-22 Shin-Etsu Handotai Company Limited Method for manufacturing a silicon epitaxial wafer
JP2003347229A (en) 2002-05-31 2003-12-05 Renesas Technology Corp Method of manufacturing semiconductor device and semiconductor device
US6727155B1 (en) * 2002-12-18 2004-04-27 Taiwan Semiconductor Manufacturing Co., Ltd. Method for spin etching sidewall spacers by acid vapor
US20070187363A1 (en) * 2006-02-13 2007-08-16 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
CN101153387A (en) * 2006-09-30 2008-04-02 中芯国际集成电路制造(上海)有限公司 High-density plasma deposition reaction chamber and air injection ring for reaction chamber
JP2008130696A (en) 2006-11-17 2008-06-05 Shin Etsu Handotai Co Ltd Silicon elimination method for silicon wafer surface, liquid sample extraction method for region under surface layer of silicon wafer, and analysis method for metal impurity in the region
JP5524453B2 (en) * 2008-05-15 2014-06-18 Sumco Techxiv株式会社 Silicon wafer etching method and etching apparatus
JP2011014579A (en) * 2009-06-30 2011-01-20 Hitachi High-Technologies Corp Device and method of plasma processing
JP5162569B2 (en) 2009-12-21 2013-03-13 ジルトロニック アクチエンゲゼルシャフト Analytical method of ultra-trace impurity metals on silicon wafer surface
JPWO2011083719A1 (en) * 2010-01-06 2013-05-13 株式会社Sumco Silicon wafer surface layer etching method and etching apparatus, and silicon wafer metal contamination analysis method
CN104103561B (en) * 2014-07-24 2016-08-24 河北神通光电科技有限公司 Etching cavity and etching system thereof for gaseous hydrogen fluoride etching silicon dioxide

Also Published As

Publication number Publication date
JP6754842B2 (en) 2020-09-16
US10861704B2 (en) 2020-12-08
TW201736653A (en) 2017-10-16
EP3229262B1 (en) 2018-08-15
JP2019511839A (en) 2019-04-25
US20190051534A1 (en) 2019-02-14
DK3229262T3 (en) 2018-12-03
WO2017174371A1 (en) 2017-10-12
CN109075056B (en) 2023-07-18
CN109075056A (en) 2018-12-21
KR102237913B1 (en) 2021-04-09
KR20180099857A (en) 2018-09-05
EP3229262A1 (en) 2017-10-11
TWI629383B (en) 2018-07-11
KR20200086386A (en) 2020-07-16

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