SG10201805233PA - Semiconductor Device Including Gates - Google Patents
Semiconductor Device Including GatesInfo
- Publication number
- SG10201805233PA SG10201805233PA SG10201805233PA SG10201805233PA SG10201805233PA SG 10201805233P A SG10201805233P A SG 10201805233PA SG 10201805233P A SG10201805233P A SG 10201805233PA SG 10201805233P A SG10201805233P A SG 10201805233PA SG 10201805233P A SG10201805233P A SG 10201805233PA
- Authority
- SG
- Singapore
- Prior art keywords
- lower electrode
- upper electrode
- electrode
- semiconductor device
- device including
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/41—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/50—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the boundary region between the core region and the peripheral circuit region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
A semiconductor device includes first gate electrodes including a first lower electrode, a first upper electrode disposed above the first lower electrode and including a first pad region, and one or more first intermediate electrodes disposed between the first lower electrode and the first upper electrode. Second gate electrodes include a second lower electrode, a second upper electrode disposed above the second lower electrode, and one or more second intermediate electrodes disposed between the second lower electrode and the second upper electrode. The second gate electrodes are sequentially stacked above the first upper electrode, while exposing the first pad region. The first lower electrode extends by a first length, further than the first upper electrode, in a first direction. The second lower electrode extends by a second length, different from the first length, further than the second upper electrode, in the first direction. FIG. 9A
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020170090215A KR102397903B1 (en) | 2017-07-17 | 2017-07-17 | Semiconductor device including gates |
Publications (1)
Publication Number | Publication Date |
---|---|
SG10201805233PA true SG10201805233PA (en) | 2019-02-27 |
Family
ID=64999831
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10201805233PA SG10201805233PA (en) | 2017-07-17 | 2018-06-19 | Semiconductor Device Including Gates |
Country Status (4)
Country | Link |
---|---|
US (2) | US10553605B2 (en) |
KR (1) | KR102397903B1 (en) |
CN (2) | CN112271180B (en) |
SG (1) | SG10201805233PA (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102397903B1 (en) | 2017-07-17 | 2022-05-13 | 삼성전자주식회사 | Semiconductor device including gates |
KR102373818B1 (en) * | 2017-07-18 | 2022-03-14 | 삼성전자주식회사 | Semiconductor devices |
US11037954B2 (en) * | 2017-10-11 | 2021-06-15 | Samsung Electronics Co., Ltd. | Three dimensional flash memory element with middle source-drain line and manufacturing method thereof |
KR20200047882A (en) * | 2018-10-25 | 2020-05-08 | 삼성전자주식회사 | Three-dimensional semiconductor device |
KR20210010725A (en) | 2019-07-18 | 2021-01-28 | 삼성전자주식회사 | Semiconductor device incuding stack structure haing gate region and insulating region |
US11362032B2 (en) * | 2019-08-01 | 2022-06-14 | Samsung Electronics Co., Ltd. | Semiconductor device |
KR20210073143A (en) | 2019-12-10 | 2021-06-18 | 삼성전자주식회사 | Semiconductor device |
Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101434588B1 (en) | 2008-06-11 | 2014-08-29 | 삼성전자주식회사 | Semiconductor Device And Method Of Fabricating The Same |
JP2012059966A (en) | 2010-09-09 | 2012-03-22 | Toshiba Corp | Semiconductor memory and its manufacturing method |
KR101738103B1 (en) | 2010-09-10 | 2017-05-22 | 삼성전자주식회사 | Therr dimensional semiconductor memory devices |
KR101744127B1 (en) * | 2010-11-17 | 2017-06-08 | 삼성전자주식회사 | Semiconductor devices and methods for fabricating the same |
KR101834930B1 (en) | 2011-02-01 | 2018-03-06 | 삼성전자 주식회사 | Vertical structure non-volatile memory device |
JP5550604B2 (en) | 2011-06-15 | 2014-07-16 | 株式会社東芝 | Three-dimensional semiconductor device and manufacturing method thereof |
US8951859B2 (en) | 2011-11-21 | 2015-02-10 | Sandisk Technologies Inc. | Method for fabricating passive devices for 3D non-volatile memory |
KR20140063147A (en) | 2012-11-16 | 2014-05-27 | 에스케이하이닉스 주식회사 | Semiconductor device and method for manufacturing the same |
KR102024723B1 (en) | 2013-01-02 | 2019-09-24 | 삼성전자주식회사 | Three dimensional semiconductor device |
US9165823B2 (en) | 2013-01-08 | 2015-10-20 | Macronix International Co., Ltd. | 3D stacking semiconductor device and manufacturing method thereof |
US9070447B2 (en) | 2013-09-26 | 2015-06-30 | Macronix International Co., Ltd. | Contact structure and forming method |
KR102128465B1 (en) * | 2014-01-03 | 2020-07-09 | 삼성전자주식회사 | Vertical structure non-volatile memory device |
KR102094470B1 (en) | 2014-04-08 | 2020-03-27 | 삼성전자주식회사 | Semiconductor Device and Method of Fabricating the Same |
TWI566365B (en) * | 2014-07-07 | 2017-01-11 | 旺宏電子股份有限公司 | Contact structure and forming method, and the circuit using the same |
KR20160013765A (en) * | 2014-07-28 | 2016-02-05 | 삼성전자주식회사 | Semiconductor device |
US9337040B1 (en) | 2014-12-05 | 2016-05-10 | Varian Semiconductor Equipment Associates, Inc. | Angled ion beam processing of heterogeneous structure |
US9859297B2 (en) | 2015-03-10 | 2018-01-02 | Samsung Electronics Co., Ltd. | Semiconductor devices and methods of manufacturing the same |
KR102333478B1 (en) * | 2015-03-31 | 2021-12-03 | 삼성전자주식회사 | Three dimensional semiconductor device |
KR20160128731A (en) | 2015-04-29 | 2016-11-08 | 에스케이하이닉스 주식회사 | Three dimension semiconductor device |
KR102449571B1 (en) * | 2015-08-07 | 2022-10-04 | 삼성전자주식회사 | Semiconductor Device |
US10453748B2 (en) * | 2015-08-27 | 2019-10-22 | Micron Technology, Inc. | Methods of forming semiconductor device structures including stair step structures |
KR102421728B1 (en) | 2015-09-10 | 2022-07-18 | 삼성전자주식회사 | Memory device and method of manufacturing the same |
KR102438753B1 (en) | 2015-10-01 | 2022-09-01 | 에스케이하이닉스 주식회사 | Semiconductor device |
KR102492979B1 (en) * | 2015-12-11 | 2023-01-31 | 삼성전자주식회사 | Vertical type memory device |
KR102536261B1 (en) * | 2015-12-18 | 2023-05-25 | 삼성전자주식회사 | Three dimensional device |
US10049744B2 (en) | 2016-01-08 | 2018-08-14 | Samsung Electronics Co., Ltd. | Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same |
KR102397903B1 (en) | 2017-07-17 | 2022-05-13 | 삼성전자주식회사 | Semiconductor device including gates |
-
2017
- 2017-07-17 KR KR1020170090215A patent/KR102397903B1/en active IP Right Grant
-
2018
- 2018-03-23 US US15/933,695 patent/US10553605B2/en active Active
- 2018-06-19 SG SG10201805233PA patent/SG10201805233PA/en unknown
- 2018-07-17 CN CN202011037677.4A patent/CN112271180B/en active Active
- 2018-07-17 CN CN201810784256.4A patent/CN109273451B/en active Active
-
2020
- 2020-02-04 US US16/780,999 patent/US10825832B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
KR20190008626A (en) | 2019-01-25 |
US10553605B2 (en) | 2020-02-04 |
US20190019807A1 (en) | 2019-01-17 |
CN109273451A (en) | 2019-01-25 |
CN112271180B (en) | 2021-12-28 |
KR102397903B1 (en) | 2022-05-13 |
CN109273451B (en) | 2022-07-08 |
US20200176470A1 (en) | 2020-06-04 |
US10825832B2 (en) | 2020-11-03 |
CN112271180A (en) | 2021-01-26 |
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