SG101949A1 - Method and apparatus for testing an integrated circuit - Google Patents

Method and apparatus for testing an integrated circuit

Info

Publication number
SG101949A1
SG101949A1 SG200100281A SG200100281A SG101949A1 SG 101949 A1 SG101949 A1 SG 101949A1 SG 200100281 A SG200100281 A SG 200100281A SG 200100281 A SG200100281 A SG 200100281A SG 101949 A1 SG101949 A1 SG 101949A1
Authority
SG
Singapore
Prior art keywords
testing
integrated circuit
integrated
circuit
Prior art date
Application number
SG200100281A
Other languages
English (en)
Inventor
Chung V Pham
Paul J Hooper
Mark A Miller
Ross A Alaspa
Casey Marshall
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of SG101949A1 publication Critical patent/SG101949A1/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31707Test strategies
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
SG200100281A 2000-01-26 2001-01-17 Method and apparatus for testing an integrated circuit SG101949A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/491,433 US6532559B1 (en) 2000-01-26 2000-01-26 Method and apparatus for testing a circuit

Publications (1)

Publication Number Publication Date
SG101949A1 true SG101949A1 (en) 2004-02-27

Family

ID=23952198

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200100281A SG101949A1 (en) 2000-01-26 2001-01-17 Method and apparatus for testing an integrated circuit

Country Status (6)

Country Link
US (1) US6532559B1 (zh)
CN (1) CN1167117C (zh)
HK (1) HK1038985B (zh)
MY (1) MY129101A (zh)
SG (1) SG101949A1 (zh)
TW (1) TWI265584B (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10028912A1 (de) * 2000-06-10 2001-12-20 Bosch Gmbh Robert Herstellungsverfahren für ein elektronisches Gerät
JP4134567B2 (ja) * 2002-02-05 2008-08-20 沖電気工業株式会社 半導体装置のテスト方法及びテストシステム
CN101159498B (zh) * 2007-11-07 2010-12-29 中兴通讯股份有限公司 一种射频硬件模块的测试方法
CN102901902A (zh) * 2011-07-28 2013-01-30 飞思卡尔半导体公司 半导体器件的并联电源连接的测试方法
TWI453436B (zh) * 2012-05-04 2014-09-21 Raydium Semiconductor Corp 積體電路可靠度測試方法
CN102740332B (zh) * 2012-05-31 2016-01-06 青岛海信移动通信技术股份有限公司 移动终端测试方法及测试装置
US9482718B2 (en) * 2014-01-13 2016-11-01 Texas Instruments Incorporated Integrated circuit
CN104317704A (zh) * 2014-09-30 2015-01-28 中国电子科技集团公司第四十一研究所 一种生产线自动测试系统的测量软件集成方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5694402A (en) * 1996-10-22 1997-12-02 Texas Instruments Incorporated System and method for structurally testing integrated circuit devices
JPH10104315A (ja) * 1996-09-27 1998-04-24 Nec Corp 半導体集積回路検査装置およびその検査方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5206582A (en) * 1988-05-18 1993-04-27 Hewlett-Packard Company Control system for automated parametric test equipment
US5717607A (en) * 1995-10-16 1998-02-10 Ford Motor Company Computer program, system and method to reduce sample size in accelerated reliability verification tests
KR100299716B1 (ko) * 1997-07-24 2001-09-06 가야시마 고조 Ic시험장치및방법
US6145106A (en) * 1997-12-31 2000-11-07 Nec Usa Inc. State relaxation based subsequence removal method for fast static compaction in sequential circuits
US6167545A (en) * 1998-03-19 2000-12-26 Xilinx, Inc. Self-adaptive test program

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10104315A (ja) * 1996-09-27 1998-04-24 Nec Corp 半導体集積回路検査装置およびその検査方法
US5694402A (en) * 1996-10-22 1997-12-02 Texas Instruments Incorporated System and method for structurally testing integrated circuit devices

Also Published As

Publication number Publication date
HK1038985B (zh) 2005-05-27
MY129101A (en) 2007-03-30
HK1038985A1 (en) 2002-04-04
CN1309422A (zh) 2001-08-22
TWI265584B (en) 2006-11-01
US6532559B1 (en) 2003-03-11
CN1167117C (zh) 2004-09-15

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