SE9901290D0 - Avdelad buffert - Google Patents
Avdelad buffertInfo
- Publication number
- SE9901290D0 SE9901290D0 SE9901290A SE9901290A SE9901290D0 SE 9901290 D0 SE9901290 D0 SE 9901290D0 SE 9901290 A SE9901290 A SE 9901290A SE 9901290 A SE9901290 A SE 9901290A SE 9901290 D0 SE9901290 D0 SE 9901290D0
- Authority
- SE
- Sweden
- Prior art keywords
- buffer
- data
- buffer device
- integrated circuit
- divided buffer
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/065—Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F2205/06—Indexing scheme relating to groups G06F5/06 - G06F5/16
- G06F2205/066—User-programmable number or size of buffers, i.e. number of separate buffers or their size can be allocated freely
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9901290A SE515897C2 (sv) | 1999-04-12 | 1999-04-12 | Anordning och förfarande för en avdelad buffert |
DE10084462T DE10084462B4 (de) | 1999-04-12 | 2000-03-31 | Geteilter Puffer |
PCT/SE2000/000631 WO2000062153A1 (en) | 1999-04-12 | 2000-03-31 | Divided buffer |
AU43223/00A AU4322300A (en) | 1999-04-12 | 2000-03-31 | Divided buffer |
US09/547,386 US6625672B1 (en) | 1999-04-12 | 2000-04-11 | Divided buffer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9901290A SE515897C2 (sv) | 1999-04-12 | 1999-04-12 | Anordning och förfarande för en avdelad buffert |
Publications (3)
Publication Number | Publication Date |
---|---|
SE9901290D0 true SE9901290D0 (sv) | 1999-04-12 |
SE9901290L SE9901290L (sv) | 2000-10-13 |
SE515897C2 SE515897C2 (sv) | 2001-10-22 |
Family
ID=20415177
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9901290A SE515897C2 (sv) | 1999-04-12 | 1999-04-12 | Anordning och förfarande för en avdelad buffert |
Country Status (5)
Country | Link |
---|---|
US (1) | US6625672B1 (sv) |
AU (1) | AU4322300A (sv) |
DE (1) | DE10084462B4 (sv) |
SE (1) | SE515897C2 (sv) |
WO (1) | WO2000062153A1 (sv) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7136991B2 (en) * | 2001-11-20 | 2006-11-14 | Henry G Glenn | Microprocessor including random number generator supporting operating system-independent multitasking operation |
US20060064448A1 (en) * | 2001-11-20 | 2006-03-23 | Ip-First, Llc. | Continuous multi-buffering random number generator |
US7219112B2 (en) * | 2001-11-20 | 2007-05-15 | Ip-First, Llc | Microprocessor with instruction translator for translating an instruction for storing random data bytes |
US7512721B1 (en) | 2004-05-25 | 2009-03-31 | Qlogic, Corporation | Method and apparatus for efficient determination of status from DMA lists |
US7895390B1 (en) * | 2004-05-25 | 2011-02-22 | Qlogic, Corporation | Ensuring buffer availability |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5233603A (en) * | 1988-04-21 | 1993-08-03 | Nec Corporation | Packet switch suitable for integrated circuit implementation |
JPH03212776A (ja) * | 1990-01-18 | 1991-09-18 | Nec Corp | ワンチップcpu |
KR970010368B1 (ko) * | 1994-01-18 | 1997-06-25 | 삼성전자 주식회사 | 캐시라인 리프레이스장치 및 방법 |
US5490113A (en) * | 1994-06-15 | 1996-02-06 | Digital Equipment Corporation | Memory stream buffer |
US5852826A (en) * | 1996-01-26 | 1998-12-22 | Sequent Computer Systems, Inc. | Parallel merge sort method and apparatus |
IL116984A (en) * | 1996-01-31 | 2000-07-26 | Galileo Technology Ltd | Multiple FIFO array and method of construction thereof |
US6290406B1 (en) * | 1996-09-20 | 2001-09-18 | Varis Corporation | System and method for interfacing a raster printer controller with a plurality of print engines |
US5959466A (en) * | 1997-01-31 | 1999-09-28 | Actel Corporation | Field programmable gate array with mask programmed input and output buffers |
US6078565A (en) * | 1997-06-20 | 2000-06-20 | Digital Equipment Corporation | Method and apparatus to expand an on chip FIFO into local memory |
KR100327330B1 (ko) * | 1998-12-17 | 2002-05-09 | 윤종용 | 램버스디램반도체장치 |
-
1999
- 1999-04-12 SE SE9901290A patent/SE515897C2/sv not_active IP Right Cessation
-
2000
- 2000-03-31 DE DE10084462T patent/DE10084462B4/de not_active Expired - Fee Related
- 2000-03-31 WO PCT/SE2000/000631 patent/WO2000062153A1/en active Application Filing
- 2000-03-31 AU AU43223/00A patent/AU4322300A/en not_active Abandoned
- 2000-04-11 US US09/547,386 patent/US6625672B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
SE9901290L (sv) | 2000-10-13 |
DE10084462T1 (de) | 2002-03-21 |
DE10084462B4 (de) | 2009-08-13 |
US6625672B1 (en) | 2003-09-23 |
SE515897C2 (sv) | 2001-10-22 |
WO2000062153A1 (en) | 2000-10-19 |
AU4322300A (en) | 2000-11-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
NUG | Patent has lapsed |