SE8700379D0 - PROTECTION OF AN ELECTRONIC COMPONENT TO VOLTAGE - Google Patents

PROTECTION OF AN ELECTRONIC COMPONENT TO VOLTAGE

Info

Publication number
SE8700379D0
SE8700379D0 SE8700379A SE8700379A SE8700379D0 SE 8700379 D0 SE8700379 D0 SE 8700379D0 SE 8700379 A SE8700379 A SE 8700379A SE 8700379 A SE8700379 A SE 8700379A SE 8700379 D0 SE8700379 D0 SE 8700379D0
Authority
SE
Sweden
Prior art keywords
component
protection
voltage
electronic component
emp
Prior art date
Application number
SE8700379A
Other languages
Swedish (sv)
Other versions
SE8700379A0 (en
Inventor
C Val
Original Assignee
Cimsa Sintra
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cimsa Sintra filed Critical Cimsa Sintra
Publication of SE8700379D0 publication Critical patent/SE8700379D0/en
Publication of SE8700379A0 publication Critical patent/SE8700379A0/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/647—Resistive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12033—Gunn diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Thermistors And Varistors (AREA)
  • Emergency Protection Circuit Devices (AREA)

Abstract

The object of the invention is a device for the protection ("hardening") of a component or of an electronic circuit which is integrated with the support of the component, from the interference (voltages) generated by an external electromagnetic field, for example the effect of the EMP wave. In one embodiment, the connections 2 of the component (C) to be protected are connected to each other by a sandwich type structure including a first layer (V 1 ) of varistor material, a first electrode (7) connected to a given potential (P), a second layer (V 2 ) of varistor material and a second electrode (8) connected to ground. The arrangement ensures a low capacitance, enabling a very rapid response to potential build-up due to an EMP.
SE8700379A 1986-01-28 1987-01-30 Device for the protection of an electronic component from voltages generated by an external field SE8700379A0 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8601379A FR2726941A1 (en) 1986-01-28 1986-01-28 INTEGRATED VARISTOR PROTECTION DEVICE OF AN ELECTRONIC COMPONENT AGAINST THE EFFECTS OF AN ELECTRO-MAGNETIC FIELD OR STATIC LOADS

Publications (2)

Publication Number Publication Date
SE8700379D0 true SE8700379D0 (en) 1987-01-30
SE8700379A0 SE8700379A0 (en) 1996-06-06

Family

ID=9331687

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8700379A SE8700379A0 (en) 1986-01-28 1987-01-30 Device for the protection of an electronic component from voltages generated by an external field

Country Status (5)

Country Link
DE (1) DE3702780A1 (en)
FR (1) FR2726941A1 (en)
GB (1) GB2300514B (en)
IT (1) IT8747549A0 (en)
SE (1) SE8700379A0 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19945426C1 (en) * 1999-09-22 2001-01-18 Siemens Ag Plug connector protecting e.g. components of circuit card from electrostatic discharge, has pins embedded in plastic including material insulating at working voltage, but conducting above it
FR2802706B1 (en) * 1999-12-15 2002-03-01 3D Plus Sa METHOD AND DEVICE FOR THREE-DIMENSIONAL INTERCONNECTION OF ELECTRONIC COMPONENTS
EP1494284A1 (en) * 2003-06-30 2005-01-05 Freescale Semiconductor, Inc. Overvoltage protection device
DE102007013986A1 (en) * 2007-03-23 2008-09-25 Osram Opto Semiconductors Gmbh Optoelectronic component e.g. LED, has protective structure comprising material e.g. ceramic material or metal oxide e.g. zinc oxide, attached to structural element and/or to contact terminal, where material is provided as pasty mass
FR2940521B1 (en) 2008-12-19 2011-11-11 3D Plus COLLECTIVE MANUFACTURING METHOD OF ELECTRONIC MODULES FOR SURFACE MOUNTING
DE102011050567A1 (en) 2011-05-23 2012-11-29 Kurt Stimpfl Connectors and their use to protect an electrical system against overvoltage discharge and method of making the same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3743897A (en) * 1971-08-05 1973-07-03 Gen Electric Hybrid circuit arrangement with metal oxide varistor shunt
US3747420A (en) * 1971-11-15 1973-07-24 Mallory & Co Inc P R Drive means for interval timer
US3900432A (en) * 1973-10-15 1975-08-19 Du Pont Varistor compositions
DE2735484C2 (en) * 1977-08-05 1984-06-07 Siemens AG, 1000 Berlin und 8000 München Process for the production of thick film varistors with zinc oxide as the main component
FR2475791A1 (en) * 1980-02-12 1981-08-14 Thomson Csf NON-LINEAR CERAMIC RESISTANCE WITH LOW THRESHOLD VOLTAGE AND METHOD OF MANUFACTURING THE SAME
JPS5884455A (en) * 1981-11-13 1983-05-20 Fujitsu Ltd Semiconductor memory device
FR2527039A1 (en) * 1982-05-14 1983-11-18 Inf Milit Spatiale Aeronaut DEVICE FOR PROTECTING AN ELECTRONIC DEVICE AGAINST THE VOLTAGES GENERATED BY AN ELECTROMAGNETIC FIELD
DE3231118C1 (en) * 1982-08-20 1983-11-03 Siemens AG, 1000 Berlin und 8000 München Combined circuit arrangement with varistor and method for its production
DE3335195A1 (en) * 1983-09-28 1985-04-04 Siemens AG, 1000 Berlin und 8000 München COMBINED CIRCUIT WITH VARISTOR

Also Published As

Publication number Publication date
GB2300514B (en) 1997-03-19
FR2726941A1 (en) 1996-05-15
IT8747549A0 (en) 1987-01-22
GB8701991D0 (en) 1996-04-24
GB2300514A (en) 1996-11-06
DE3702780A1 (en) 1996-07-04
SE8700379A0 (en) 1996-06-06

Similar Documents

Publication Publication Date Title
DE3889650T2 (en) Integrated semiconductor circuit with an input voltage limiter.
DE69021749D1 (en) Surge protection system.
ATE51974T1 (en) SECURITY AND PROTECTION PLATE.
ATE14170T1 (en) PROTECTIVE ARRANGEMENT FOR ELECTRONIC CIRCUITS, LIKE INTEGRATED CIRCUITS, AGAINST ELECTROSTATIC CHARGES.
ATE47505T1 (en) MONOLITHIC INTEGRATED SEMICONDUCTOR CIRCUIT.
SE9102183L (en) A SHIELDING CONSTRUCTION FOR ELECTRICAL DEVICES
KR850000803A (en) Semiconductor devices
SE8700379D0 (en) PROTECTION OF AN ELECTRONIC COMPONENT TO VOLTAGE
EP0385524A3 (en) Monolithic integrated structure for a two-stage driving system with level translator circuit component of the driving signal for power transistors
IT8619906A0 (en) PROCEDURE FOR THE MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUITS INCLUDING CMOS DEVICES AND HIGH VOLTAGE ELECTRONIC DEVICES.
JPH0547943A (en) Semiconductor integrated device
DE68920282D1 (en) Protection of electronic circuits against static electricity.
JPS5371584A (en) Semiconductor integrated circuit device
KR950020965A (en) Semiconductor devices
IT1035609B (en) PROCEDURE AND SYSTEM FOR THE ASSEMBLY OF ELECTRICAL AND ELECTRONIC COMPONENTS ON THE CIRCUIT PANELS
JPS5289477A (en) Input protecting circuit
KR900015308A (en) Power failure protection circuit
JPS55112038A (en) Bootstrap-type circuit
JPH0341003B2 (en)
JPS62232210A (en) Filter circuit for integrated device
JPS6015402Y2 (en) Electronics
JPS58178262A (en) Voltage divider
JPS62144303A (en) Static absorber
JPS5638853A (en) System for protecting input and output of semiconductor integrated circuit
JPS6259462B2 (en)

Legal Events

Date Code Title Description
NAV Patent application has lapsed

Ref document number: 8601379-4

Effective date: 19910214

NAV Patent application has lapsed

Ref document number: 8700379-4