RU2809206C1 - Threshold module for implementing threshold function with single weights of arguments and threshold of three - Google Patents

Abstract

FIELD: computer engineering.

SUBSTANCE: threshold module contains seven OR elements (1₁, …, 1₇) and eight AND elements (2₁, …, 2₈), the first, second, third inputs of the eighth AND element and the output of the seventh OR element are connected, respectively, to the outputs of the third, fourth, fifth OR elements and the output of the threshold module.

EFFECT: simplifying the threshold module circuit by reducing its Quine cost while maintaining the elemental basis of the prototype.

1 cl, 1 dwg

Description

The invention relates to computer technology and can be used in the construction of automation equipment, functional units of control systems, etc.

Threshold modules are known (see, for example, RF patent 2757821, class G06F7/38, 2021), which contain AND elements, OR elements and implement a threshold function with unit weights of arguments and a threshold of three, depending on seven arguments - input binary signals .

The reason that prevents the achievement of the technical result indicated below when using known threshold modules is the circuit complexity due to the fact that the Quine price of the circuit, in particular, the mentioned analogue, is 38.

The closest device of the same purpose to the claimed invention in terms of the set of features is the threshold module adopted as a prototype (RF patent 2787336, class G06F7/38, 2023), which contains AND elements, OR elements and implements a threshold function with unit weights of arguments and a threshold three, depending on seven arguments - input binary signals.

The reason that prevents the achievement of the technical result indicated below when using the prototype is the circuit complexity due to the fact that the Quine price of the prototype circuit is 36.

The technical result of the invention is to simplify the threshold module circuit by reducing its Quine price while maintaining the elemental basis of the prototype.

The specified technical result when implementing the invention is achieved by the fact that in a threshold module containing seven OR elements and eight AND elements, the first inputs of the sixth, seventh and the first, second inputs of the kth ( ) AND elements are connected, respectively, to the outputs of the first, second AND elements and the first, second inputs of the k -th OR element, the outputs of the j -th ( ), sixth and second entrance ( ) of the OR elements are connected respectively to the first inputs ( )th, third and second input ( ) of the AND elements, the first, second, third, fourth inputs of the sixth and the first, second, third, fourth inputs of the seventh OR elements are connected, respectively, to the outputs of the first, fourth, second, fifth and third, eighth, sixth, seventh AND elements, and second inputs of the third, ( )-th and first, second inputs of the j -th elements AND are connected respectively to the seventh, ( )-mu and ( )-mu, ( )-th inputs of the threshold module, the peculiarity is that the first, second, third inputs of the eighth AND element and the output of the seventh OR element are connected, respectively, to the outputs of the third, fourth, fifth OR elements and the output of the threshold module.

The drawing shows a diagram of the proposed threshold module.

The threshold module contains OR elements 1 ₁ ,…,1 ₇ and AND elements 2 ₁ ,…,2 ₈ , with the first inputs of elements 2 ₆ , 2 ₇ and the first, second inputs of element 2 _k ( ) are connected respectively to the outputs of elements 2 ₁ , 2 ₂ and the first, second inputs of element 1 _k , outputs of elements 1 _j ( ), 1 ₆ and the second input of element 1 _{j +3} are connected respectively to the first inputs of elements 2 _{j +3} , 2 ₃ and the second input of element 2 _{j +5} , the first, second, third, fourth inputs of element 1 ₆ and the first, second, the third, fourth inputs of element 1 ₇ are connected, respectively, to the outputs of elements 2 ₁ , 2 ₄ , 2 ₂ , 2 ₅ and 2 ₃ , 2 ₈ , 2 ₆ , 2 ₇ , the first, second, third inputs of element 2 ₈ are connected, respectively, to the outputs of elements 1 ₃ , 1 ₄ , 1 ₅ , and the second inputs of elements 2 ₃ , 2 _{j +3} and the first, second inputs of element 2 _j are connected respectively to the seventh, ( )-m and ( )-m, ( )th inputs of the threshold module, the output of which is connected to the output of element 1 ₇ .

The operation of the proposed threshold module is carried out as follows. Binary signals are supplied to its first,..., seventh inputs, respectively . The signal at the output of element 1 ₇ is determined by the expression

,

in which ∨, ⋅ are symbols of the OR, AND operations. Consequently, at the output of the proposed threshold module we obtain

,

Where there is a threshold function with unit argument weights and threshold three.

The above information allows us to conclude that the proposed threshold module is built in the elemental basis of the prototype and implements a threshold function with unit weights of arguments and a threshold of three, depending on seven arguments - input binary signals. At the same time, the circuit of the proposed threshold module is simpler than that of the prototype, since its price according to Quine is 35.

Claims (1)

A threshold module designed to implement a threshold function with unit weights of arguments and a threshold of three, containing seven OR elements and eight AND elements, with the first inputs of the sixth, seventh and the first, second inputs of the kth ( ) AND elements are connected, respectively, to the outputs of the first, second AND elements and the first, second inputs of the k -th OR element, the outputs of the j -th ( ), sixth and second entrance ( ) of the OR elements are connected respectively to the first inputs ( )th, third and second input ( ) of the AND elements, the first, second, third, fourth inputs of the sixth and the first, second, third, fourth inputs of the seventh OR elements are connected, respectively, to the outputs of the first, fourth, second, fifth and third, eighth, sixth, seventh AND elements, and second inputs of the third, ( )-th and first, second inputs of the j -th elements AND are connected respectively to the seventh, ( )-mu and ( )-mu, ( )-th inputs of the threshold module, characterized in that the first, second, third inputs of the eighth AND element and the output of the seventh OR element are connected, respectively, to the outputs of the third, fourth, fifth OR elements and the output of the threshold module.