RU2720219C1 - Adaptive digital predictive device - Google Patents

Abstract

FIELD: computer equipment.

SUBSTANCE: invention relates to computer engineering. Technical result is achieved due to adaptive digital predictive device, which includes: smoothing unit; prediction unit comprising first and second subtractors, each of which includes a register memory buffer, a multiplexer, an inverter unit and an adder; subunit for calculating a quadratic prediction, comprising two adders and an inverter; subunit for calculating linear prediction from one adder; adder of discrete outputs averaging of quadratic and linear prediction units; subunit calculating 1st derivative of one adder; mode flip-flop; a prediction dynamics control unit comprising a prediction time setting input register, an inverter, a counter and a multiplexer; unit for switching operating mode of device from stationary to dynamic; a prediction unit timing unit; scheme for correcting a prediction code on dynamics, wherein the prediction unit includes an additional subunit for correcting a prediction code on a stationary mode, comprising an inverter and three adders.

EFFECT: technical result consists in broader functional capabilities by increasing depth of prediction while maintaining same volume of history buffer.

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Description

The invention relates to automation and computer technology and can be used to smooth and predict stationary and non-stationary random processes, improve control accuracy in digital guidance systems for various (including ballistic) objects.

Known adaptive digital smoothing and predictive device (RF patent No. 2626338, IPC G06F 15/00, 07/26/2017, bull. No. 21), containing a smoothing unit and a forecast unit, which includes: three subtractors, a unit for controlling the dynamics of the forecast, two a subblock of quadratic and linear forecasts, a correction scheme for the forecast code for dynamics, subblocks for calculating the first derivative and counting increments of the process speed and an adaptation block. The device has a relatively large amount of equipment and is functionally limited.

The closest in technical essence to the claimed device is the adaptive digital smoothing and predictive device selected as a prototype (RF patent No. 2622852, IPC G06F 17/17, 06/20/2017, bull. No. 17), containing a smoothing unit and a forecast unit, which includes: two subtractors, a forecast dynamics control unit, two sub-blocks of quadratic and linear forecasts, a dynamic forecast code correction scheme, sub-blocks for calculating the first derivative and counting process speed increments. The device is also functionally limited.

In practice, by the nature of the change in time, discrete random processes (SPs) can be divided into two types (modes): steady-state (stationary) and transitional (hereinafter “dynamics”). The first is characterized by the steady-state velocity of the median (deterministic basis) of the joint venture, the second is nonlinear and takes a relatively short time for the median of the joint venture to transition to a new steady state. The spectrum of changes in the velocity of the median SP on the dynamics can occupy a rather large range: from slowly changing to high speeds (almost a jump).

In the prototype, as in analogs, the best approximation of the analytical operators for calculating quadratic and linear forecasts is implemented using approximating polynomials at 3 points (ordinates) of a two-level buffer for storing the history of the input smoothed random discrete process using the least squares method, and the forecast time interval (depth) h is half the time (B _t ) of the storage of ordinates in the history buffers B _t = 2h. For example, the forecast for Н = h = 10 sec., Requires storing information about the process in the history buffer for the period B _t = 2h = 20 sec.

The technical problem for the proposed device is to expand the functionality by increasing the real-time (depth) forecast by five times while maintaining the same amount of historical memory buffer, i.e. (see example above) now, when setting the required forecast time, Н = 5h = 50 sec. the storage time of information (the memory size of the history buffers) remains unchanged: B _t = 2h = 20 sec., and not B _t = 2Н = 100 sec., which would be required in accordance with the analytical formulas for calculating the forecast.

Therefore, in an adaptive digital predictive device, which includes: a smoothing unit containing m = 32 series-connected channels, a register and a multiplexer, and the outputs of each m = 1, 2, 4, 8, 16, and 32nd channels are connected to information the inputs of the multiplexer, the address input of which is connected to the output of the register, the input of the latter is connected to the first control input of the device to set the degree (efficiency) of smoothing k = 0, 1, 2, 3, 4 or 5 (m = 2 ^k ), and the input of the first channel is the information input (x _p ) of the device, and the unit fire containing the first and second subtractors, each of which includes a register memory buffer, a multiplexer, an inverter unit and an adder, the input of the first subtractor connected to the output of the multiplexer of the smoothing unit; a quadratic prediction calculation subunit comprising two adders and an inverter, the output of the second adder being the output of the subunit; a subunit for calculating a linear forecast from one adder, the output buses of which are the output of the subunit; the averaging adder discrete outputs of the sub-blocks of the quadratic and linear forecasts, the output buses of which are mountingly shifted to the right (towards the lower bits) by one bit; subunit of calculating the 1st derivative of one adder; trigger mode; a prediction dynamics control unit comprising a prediction time setting input register, the input of which is a second control input of the device defining a virtual forecast interval, an inverter, a counter and a multiplexer, the output buses of the prediction time setting input register being connected directly to the first input of the multiplexer, assembly shifted to the right by three digits - to the second input of the multiplexer and, mountingly shifted to the left by one digit, through the inverter - to the counter input, the bus of direct transfer of the latter to “0” the input (reset bus) of the mode trigger, the multiplexer output is connected to the address inputs of the multiplexers of both subtracters, and the address input of the multiplexer is connected to the direct (“1”) output of the mode trigger; a subunit for switching the operating mode of the device from stationary to dynamics, containing two sequentially connected storage registers of the current and previous discrete process speed discs, a comparator, two AND elements, a reverse counter and an OR element, with the output of the subunit connected to the “1” mode trigger input and to the recording bus the counter of the forecast dynamics control unit, and the information input of the first register of the subunit is connected to the output of the adder (without its sign bit bus) of the subunit of calculating the first derivative of the input smoothed case ayna process; a timing unit of a prediction block containing four delay elements; a dynamic prediction code correction scheme containing a block of inverters, three adders and a multiplexer, the address input of which is connected to the direct (“1”) output of a mode trigger, to solve the problem, an additional stationary correction prediction code correction subunit is introduced in the forecast block, containing an inverter and three adders, in which the first input of the first adder is connected to the output of the multiplexer of the smoothing unit, the second input of this adder is connected to the inverter output of the second subtractor, the output buses of the first adder can carefully shifted to the left by two digits (towards the higher digits) are connected to the first input of the third adder, and mountingly shifted to the right by one bit, through the inverter unit, to the first input of the second adder, the second input of which is connected to the output of the multiplexer of the second subtractor, the output of the second the adder is connected to the second input of the third adder, the output of which is connected to the first information input of the multiplexer of the prediction code correction scheme on the speaker, in which the inputs of the first adder are connected, respectively , the outputs of the averaging adder and the inverter of the second subtractor, the output buses of the first adder, assembly-wise shifted to the right by four digits, are connected to the second input of the third adder, and the assembly-wise shifted to the right by one bit, through the inverter unit, to the first input of the second adder, the second input of which connected to the output of the second subtractor multiplexer, the output of the second adder is connected to the first input of the third adder, the output of which is connected to the second information input of the multiplexer, and the output of the multiplexer is the output devices.

The invention is illustrated by drawings, which depict: FIG. 1 is a block diagram of the proposed device; FIG. 2 is a diagram of a timing unit of a forecast block; FIG. 3 - graphical interpretation of the derivation of the formulas for the correction of the forecast code in stationary mode and in dynamics; appendix (on 3 sheets) - the results of modeling the operation of a device on a computer when processing a non-stationary random process.

The known prediction operator formulas obtained analytically using approximating polynomials in three points (ordinates) of the buffer history of the input random discrete process using the least squares method (Milne V.E. Numerical analysis. M., IL, 1951, p. 212), by the approximating polynomial of the second degree (quadratic):

first degree (linear):

or

where y _p is the first (current) calculated point (ordinate);

for _n-1 , for _n-2 , respectively, the second and third calculated points (ordinates) of the two-level buffer for storing the history of the input smoothed discrete sequence. In numerical analysis, this is a system of equally spaced points with a step h, in real time H = h is the forecast time (depth), and the period of storage of current information in the history memory buffers is two forecast intervals B _t = 2h.

Let Δy ₁ = (2y _p - y _p-1 ) be the biodiversity of the first level of the history of the input discrete sequence, i.e. the difference between the doubled current and previous ordinates of the process; Δy ₂ = (2y _p-1 - at _p-2 ) - the biodiversity of the second level of history. Then, after transformation (1) and (2), we obtain the following empirical expressions for the quadratic and linear prediction operators:

The proposed device implements forecast operators according to formulas (3) and (4), the main elements of the circuit being an adder and an inverter unit, and multiplying the coefficients by the terms is carried out by the corresponding mounting shifts of the latter buses when entering the adder. Such operations in the flowchart (see Fig. 1) are indicated by a circle.

The device contains (see Fig. 1) a smoothing unit 1, consisting of a multi-channel digital smoothing device 2 on m = 32 series-connected channels (see ed. St. USSR No. 686034, class G06F 15/32, 1979 and No. 748417, 1980), register 3 sets the degree of smoothing (k) and multiplexer 4, the output of which is a smoothed code (Y _n ) of the median of the joint venture; a prediction block containing two series-connected subtractors 5 and 6, each of which includes a register memory buffer 7 from (A) series-connected registers 8, a multiplexer 9, an inverter block 10 (assuming that the multiplexer does not have inverse outputs) and an adder eleven; a quadratic prediction calculation subunit 12, comprising a block of inverters 13, first 14 and second 15 adders, the output of the latter being the output of the subunit; a subunit 16 for calculating a linear forecast from the inverter 17 and the adder 18, the output bus of which is the output of the subunit; an adder 19 averaging the output codes of both prediction subunits 12 and 16; a subunit 20 for calculating the first derivative of the adder 21; a subunit 22 of switching the operating mode of the device from stationary to dynamics, comprising two series-connected registers 23 and 24, a comparator 25, two elements And 26 and 27, a reverse counter 28 and an OR element 29; trigger mode 30 (TG); a prediction dynamics control unit 31 comprising a prediction time setting input register (h) 32, the input 33 of which is the first control input of the device through which the virtual forecast time h = AT is introduced, where T is the operation cycle of the device, if T = 1 is assumed unit of time, then h = A is the number (max, address) of registers 8 in the process history buffers 7, inverter 34, time counter 35 (2h) of the operation of the forecast block on the dynamics and multiplexer 36; the second control input 37 to enter the degree of smoothing (k) SP, information (x _n ) 38 and clock (f _T ) 39 the inputs of the device; the timing unit 40 of the forecast block (see FIG. 2) contains four delay elements 41; the dynamic prediction code correction circuit 42 includes a block of inverters 43, three adders 44, 45, and 46 and a multiplexer 47; an additional sub-block 48 of the correction of the forecast code in stationary mode contains a block of inverters 49, three adders 50, 51 and 52; device output 53.

In stationary mode, the forecast block, in accordance with formulas (3) and (4), calculates the forecast code for 3 points (y _p , y _p-1 and _p-2 ) of a 2-level history buffer for a given (virtual ) forecast time (depth) h. Given the linearity of the median SP in this mode, the obtained quadratic and linear components of the forecast are almost equal and averaged.

To bring the forecast code in stationary mode (TG = 0) in accordance with the required real (five times H = 5h) forecast time, an additional sub-block 48 of the forecast code correction was introduced into the device. A graphical interpretation of the operation algorithm of this subunit, based on the postulate of a linear approximation of the median of the input process, is presented in FIG. 3, where Δ0 = (Y _n - Y _n-2 ) and Δ5 = (Y _{n + 5} - Y _n-2 ) are the correction differences of the forecast in the stationary mode, then according to the known relations in similar triangles we have:

Equation (5) is implemented in the proposed device in an additional sub-block 48 of the correction of the forecast code in stationary mode for the real five times forecast (depth) of the forecast H = 5h, and the output prediction code of the sub-block is set at the first information input of the multiplexer of the dynamic prediction code correction circuit 42.

With the onset of dynamics (transition of the median of the joint venture to a nonlinear section), new (fresh) information (at _n ) arrives only at the 1st level of the history buffer, at the second level (at _n-1 , at _n-2 ) the data of the previous stationary mode are stored : Naturally, the current forecast discretes obtained are inaccurate and differ significantly from the realities. To use the linear algorithm for calculating the forecast in stationary mode and on the dynamics, the device switches to work not with the full (h), but 8 times truncated history buffer (i.e., the non-linear median of the joint venture on the dynamics is analytically subjected to piecewise-linear approximation). Now, in the calculation of the forecast code (according to the linear algorithm), only the current ("fresh") discretes of the truncated section of the 1st level of the history buffer are involved. The resulting code already gives an accurate and reliable forecast of changes (growth or decrease) in the input process on the dynamics, but only for the forecast time (depth) reduced by 8 times h _k = h / 8 (conditionally, it can be called technological).

To determine the moment of transition of the stationary mode to the dynamics, an algorithm is used to fix a series of K = 8 increments of the velocity of the median SP in the stationary mode of the same sign in a row. The speed of the median SP is set at the output of subunit 20: y ' _n-1 = (y _n - y _n-2 ) / h. The increment is the result of comparing, at each measure, the current and previous values of the 1st derivative at (at _n-1 ) a point in the history buffer: Δy ' _n-1 - y' _n-1 [w] - y ' _n-1 [w- 1]. Variable sign increments in the velocity of the median SP relative to the average (steady-state) speed in the stationary mode are equally probable and obey the geometric distribution law P (Δy ' _n-1 = K) = (1/2) ^K , for K = 8: P (Δy' _n-1 = 8) = 1 / 256≈0.004, i.e. so small that the appearance of such a series can be considered the beginning of a transitional regime (dynamics). The mode switching subunit 22 introduced into the device captures such a series and switches the device from stationary mode to dynamics.

Bringing the forecast code on the dynamics in line with the real (five times increased forecast time H = 5h) is carried out in the scheme 42 correction forecast code on the dynamics. A graphical interpretation of the operation algorithm of this circuit, based on the postulate of a linear approximation of the median of the input process, is presented in FIG. 3.

Let ΔK = (Y ^k _{n + 1} - Y ^k _n-2 ) be the correction forecast difference on the dynamics, h _k = h / 8, h = 8h _k , ΔR ₅ = Y ^k _{n + 5} - Y ^k _n-2 , then, in accordance with the known aspect ratios in similar triangles, we have:

Equation (6) is implemented in the proposed device in the scheme 42 of the correction of the forecast code on the dynamics for the real five times forecast (depth) of the forecast H = 5h, and the output forecast code of the circuit is set on the second information input of the circuit multiplexer.

. Эффективность сглаживания выбирается заданием со входа 32 степени k=0, 1, 2, 3, 4 или 5, которая в свою очередь определяет число задействованных каналов сглаживания m=2^k (1, 2, 4, 8, 16 или 32).The cycle of the device consists of two clock cycles. In the first, the smoothing unit 1 ends, each channel of which implements the exponential smoothing operator

. The smoothing efficiency is selected by setting the input 32 of degree k = 0, 1, 2, 3, 4, or 5, which in turn determines the number of smoothing channels involved m = 2 ^k (1, 2, 4, 8, 16, or 32).

In the second clock cycle 40, the first series of mini-tacts ("a" and "b") initiates the operation of two subtractors 5 and 6, subunits 12 and 16 of calculation according to formulas (3) and (4) of the quadratic and linear components of the forecast block, the sum of the codes of the last at the output of the adder 19 is averaged Y _{n + 1} = Y _{n + 1} [SR] = (Y _{n + 1} [KB3] + Y _{n + 1} [LN3]) / 2. In the same clock cycle, an additional subunit 48 of the correction of the forecast code in the stationary mode and the correction code of the forecast code for the dynamics 42 are completed.

In the third mini-tact “c”, the previous y ' _n [(w-1) T] is written to register 24 from register 23, and the last y - _n [(w) T] discretes the absolute values of the process speed. In the fourth mini-tact “d”, with a positive increment (+ Δy ' _n ) in the comparator 25, the clock pulse will go to the summing (if negative - to subtracting) input of the four-digit reversible counter 28. After 8 cycles (K = 8), increments of one sign in a row in the counter an impulse will be generated of direct (at + Δy ' _n ) or reverse (at -Δy' _n ) transfer, which, through the OR element 29, will set the mode 30 trigger to “1” (TG = 1). The device will switch to the speaker. The same pulse will be written to the counter 35 from the register 34 of the dynamics control unit 31 inverse code of the number of ticks (2h), i.e. device runtime in dynamic mode. Direct output (“1”) of trigger 30 will allow the issuance of a prediction code Y ^d _{n + 5} on the speaker (corresponding to the real forecast time H = 5h) from multiplexer 47 of correction circuit 42 to the output of device 53 and will switch multiplexer 36 of dynamics control unit 31 to block operation forecast with only 1/8 of the history buffer of the process, respectively, with h _k = h / 8 (technological) forecast time.

The device switches from the dynamics to the stationary mode by resetting the mode trigger (TG = 0) to “0” by the direct transfer pulse of counter 35 of the control unit 31, i.e. only after filling (2h) the process history buffer with new information in the new mode. Accordingly, the multiplexer 36 will switch to issuing a predetermined (virtual) forecast interval (time) h to the history buffer, and the multiplexer 47 will switch to the output 53 of the forecast code device Y _{n + 5} = Y ^s _{n + 5} (corresponding to the real five times forecast time H = 5h )

The appendix contains the results of modeling the operation of the device. Column No. 5:

ΔP _k = (Y _n [w + 5h] - Y _{n + 5} ) - forecast error with correction on the dynamics (TG = 1).

Column number 8:

ΔР = (Y _n [w + 5h] - Y _{n + 5} [SR]) - forecast error without correction on the dynamics.

Columns No. 6 and No. 9:

% - forecast accuracy in%.

The refinement (modernization and simplification) of the analytical operators for calculating and increasing the forecast time for the application of arithmetic operations (multiplication and division) of multiple powers of 2 and replacing the latter, in turn, with the mounting shifts of the buses of the terms of the polynomials during input (or output) into the adder allows simplifying the device (abandon the microprocessor), increase the speed by an order of magnitude and reduce hardware costs for the manufacture of electronic components of control and guidance systems, especially in mass production.

Claims (1)

An adaptive digital predictive device, which includes: a smoothing unit containing m = 32 series-connected channels, a register and a multiplexer, and the outputs of each m = 1, 2, 4, 8, 16 and 32nd channels are connected to the information inputs of the multiplexer, whose address input is connected to the register output, the input of the latter is connected to the first control input of the device to set the degree (efficiency) of smoothing k = 0, 1, 2, 3, 4 or 5 (m = 2 ^k ), and the input of the first channel is an information input (x _n) unit, and prediction unit, with ERZHAN first and second subtracters, each of which includes a memory buffer register, the multiplexer, the adder and the inverter unit, wherein the input of the first subtracter connected to the output of multiplexer smoothing unit; a quadratic prediction calculation subunit comprising two adders and an inverter, the output of the second adder being the output of the subunit; a subunit for calculating a linear forecast from one adder, the output buses of which are the output of the subunit; the averaging adder discrete outputs of the sub-blocks of the quadratic and linear forecasts, the output buses of which are mountingly shifted to the right (towards the lower bits) by one bit; subunit of calculating the 1st derivative of one adder; trigger mode; a prediction dynamics control unit comprising a prediction time setting input register, the input of which is a second control input of the device defining a virtual forecast interval, an inverter, a counter and a multiplexer, the output buses of the prediction time setting input register being connected directly to the first input of the multiplexer, assembly-shifted to the right by three digits - to the second input of the multiplexer and mountingly shifted to the left by one digit, through the inverter - to the counter input, the bus of direct transfer of the latter to “0” the input (reset bus) of the mode trigger, the multiplexer output is connected to the address inputs of the multiplexers of both subtracters, and the address input of the multiplexer is connected to the direct (“1”) output of the mode trigger; a subunit for switching the operating mode of the device from stationary to dynamics, containing two sequentially connected storage registers of the current and previous discrete process speed discs, a comparator, two AND elements, a reversible counter and an OR element, the subunit output being connected to the “1” mode trigger input and to the recording bus the counter of the forecast dynamics control unit, and the information input of the first register of the subunit is connected to the output of the adder (without its sign bit bus) of the subunit of calculating the first derivative of the input smoothed case ayna process; a timing unit of a prediction block containing four delay elements; a dynamic prediction code correction scheme containing a block of inverters, three adders and a multiplexer, the address input of which is connected to a direct (“1”) output of a mode trigger, characterized in that an additional stationary correction prediction code correction subunit is included in the forecast block, which contains an inverter and three adders, in which the first input of the first adder is connected to the output of the multiplexer of the smoothing unit, the second input of this adder is connected to the inverter output of the second subtractor, the output buses of the first adder, mounting left to two digits (towards the higher digits), connected to the first input of the third adder, and mountingly shifted to the right by one bit, through the inverter unit, to the first input of the second adder, the second input of which is connected to the output of the multiplexer of the second subtractor, the output of the second the adder is connected to the second input of the third adder, the output of which is connected to the first information input of the multiplexer of the prediction code correction scheme on the speaker, in which the outputs from the first adder are connected, respectively the averaging adder and the inverter of the second subtractor, the output buses of the first adder, mountingly shifted to the right by four digits, are connected to the second input of the third adder, and the mounting buses are shifted to the right by one bit, through the inverter unit, with the first input of the second adder, the second input of which is wound up the multiplexer output of the second subtractor, the output of the second adder is connected to the first input of the third adder, the output of which is connected to the second information input of the multiplexer, and the output of the multiplexer is the output of the devices and.

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