RU2580452C1 - Signature smoothing digital device - Google Patents

Abstract

FIELD: computer engineering.

SUBSTANCE: invention can be used in digital systems and devices for smoothing stationary and slowly varying stochastic processes. Apparatus comprises an adder unit increments of down counter, and two AND gates, a control mode of operation and block the formation of a series of deviations mark row.

EFFECT: technical result is a significant simplification of the device and improving the efficiency of anti-aliasing.

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Description

The invention relates to automation and computer engineering and can be used in digital systems and devices for smoothing stationary and slowly changing random processes.

Known adaptive digital smoothing device (RF patent No. 2444123, IPC Н03Н 17/04, 02/27/2012, bull. No. 6), containing the adder, two comparators, a unit for defining the ratio of deviations, a control unit for the dynamic response and two reversible counters. The device has a complex circuit switching nodes and a large amount of equipment.

The closest in technical essence to the claimed device is a signature digital smoothing device (AS USSR No. 1092519, IPC G06F 15/353, 1982), selected as a prototype, comprising an adder, a reversible counter, an operating mode control unit and a deviation series generation unit one character in a row. The device also has a relatively large amount of equipment.

The technical problem for the proposed device is to simplify the device, i.e. reduction of hardware costs during its implementation.

Therefore, in the signature digital smoothing device containing the adder, an increment block of two AND elements and a reverse counter, the information input of which is connected to the first input of the adder and the information input of the device, the second adder input is connected to the inverse output of the reverse counter; operating mode control unit (BURR), which includes two pulse shapers of a change in the sign of deviations, an OR element, two AND elements, a deviation counter of one sign in a row and a trigger whose inverse ("0") output is wound to the second inputs of both elements AND of the increment block , the output of the second element AND BURR is connected to the write bus of the reversible counter, the sign discharge of the adder is directly and through a key (element NOT) connected to the corresponding inputs of both pulse shapers BURR and to the first inputs of both elements AND the increment block, in passages which are connected respectively to the summing and subtracting input of down counter; a series unit of one character in a row containing a delay element, a comparator, a register and an AND element, the output of which is connected to the third inputs of both elements and an increment block, the register information input is the input of the smoothing parameter setting, and the register output is connected to the first comparator input, to solve of the assigned task, the information output of the counter of deviations of one sign in a row BURR is directly connected to the second input of the comparator of the unit of formation of series of one sign in a row.

The invention is illustrated by drawings, which depict: in FIG. 1 is a block diagram of a device; in FIG. 2 - tables of the results of modeling the operation of the device and prototype.

The device comprises an adder 1, an inverter 2, an operating mode control unit 3 comprising pulse shapers 4, an OR element 5, a counter 6 of deviations of one sign in a row, two elements And 7.1 and 7.2, and a trigger 8, an increment block 9 containing two elements And 10 and a reversible counter 11, a deviation series forming unit 12, including a comparator 13, a register 14, an AND element 15 and a delay element 16, an information input 17, an input 18 for entering a smoothing parameter m, an information output 19, and a clock input 20.

The proposed device, like the prototype, implements a modified signature recursive Fabian smoothing algorithm (Senin A.G. Recognition of random signals. SB USSR Academy of Sciences, Nauka, 1974):

where X _n and Y _n-1 - the current discrete source and smoothed discrete sequences; ΔX _n = (X _n -Y _n-1 ) is the current deviation from the median of the process;

Z = Π ^m _{j = 1} (X _{n + 1-j} -Y _nj ), where j = (1 ÷ m), m = (2 ÷ M) is the smoothing parameter or a series of deviations of the same sign in a row. Moreover, the function σ (Z) = 1 (true), when the current deviations reach m given deviations of one sign in a row and σ (Z) = 0 (false) for any other combination of signs of deviations. In the device, the function σ (Z) is implemented in block 12 of the formation of a series of deviations.

The principle of signature smoothing uses the symmetry of the distribution density curve of smoothed random processes, i.e. the appearance of “+” and “-” deviations of the current discrete process from its median for most known distribution laws (normal, uniform, etc.) is equally probable. It can also be argued about the probability of occurrence of heterogeneous series of m deviations of the same sign in a row, which for statistically independent random processes obeys the geometric distribution law (J. Pollard. Handbook of Computational Methods of Statistics. M., “FS”, 1982, § 10.10, p. 121 )

where q = ½ is the probability of different series.

The device operates in two modes. In the first (smoothing mode) - after the formation of the current deviation sign (X _n -Y _n-1 ) in the first clock at the output of the adder 1, the clock from the input 20 through block 12 and the permissions from the trigger 8 of the control block 3 of the operating mode generates in the second clock an increment of +1 with a positive deviation (or -1 with a negative) in the reverse counter 11 in accordance with the signature function (2).

The second mode of operation is dynamic, which the device automatically enters when increasing (or decreasing), for example, almost spasmodically, the medians of the input discrete sequence. The moment of regime change occurs when a series of M deviations of one sign in a row appear, and the value of M should exclude the appearance of such a series in stationary mode. Let M = 8, then from (3) we have the probability P (x = M) = 1 / 512≈0.002, i.e. negligible. The value M = 8 determines the bit depth of counter 6. Upon receipt of the 8th consecutive pulse from input 20 to counter 6 “1” of the senior (4th) discharge, set trigger 8 to “1”. The latter will allow recording the current discrete from the device’s input to the counter 11 and block the operation of the increment block 9 through the And 10 elements. Upon completion of the dynamic mode and exit to the stationary one in adder 1, deviations of different signs inevitably occur, and when the sign changes from “+” to “- ”(Or vice versa) pulse shapers 4 start to work, the latter reset the counter 6 and trigger 8, i.e. the device switches back to the stationary smoothing mode.

Block 12 forming a series of m deviations of one sign in a row works as follows. From the input 18 to the register 14 before starting the operation of the device, the code of the series m is recorded, which determines the specified degree of smoothing. The clock pulse from input 20, when the counter code 6 of the control unit 3 coincides with m (the output of the comparator "A = B"), depending on the deviation sign, implements the smoothing operator (1).

As can be seen from the tables in FIG. 2, the smoothing efficiency of the proposed device is not worse and even slightly higher than that of the prototype.

Claims (1)

Signature digital smoothing device containing an adder, an increment unit of two AND elements and a reverse counter, the information input of the latter is connected to the first input of the adder and the information input of the device, the second input of the adder is connected to the inverse output of the reverse counter; operating mode control unit (BURR), which includes two pulse shapers of a change in the sign of deviations, an OR element, two AND elements, a deviation counter of one sign in a row and a trigger whose inverse ("0") output is wound to the second inputs of both elements AND of the increment block , the output of the second element AND BURR is connected to the write bus of the reversible counter, the sign discharge of the adder is directly and through a key (element NOT) connected to the corresponding inputs of both pulse shapers BURR and to the first inputs of both elements AND the increment block, in passages which are respectively connected to a summing and subtracting input of down counter; a series forming unit of one character in a row, containing a delay element, a comparator, a register, and an AND element, the output of which is connected to the third inputs of both elements of the AND increment block, the register information input is the input of the smoothing parameter setting, and the register output is connected to the first comparator input, characterized in that the information output of the counter of deviations of one sign in a row BURR is directly connected to the second input of the comparator of the block of formation of series of one sign in a row.

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