RU2517316C1 - Adaptive digital predictor - Google Patents

Abstract

FIELD: information technology.

SUBSTANCE: in the adaptive digital predictor, both inputs of terms of the first adder of the quadratic prediction subunit are respectively connected to data outputs of the first and second second-derivative calculation subunits, and the output of the first adder is connected to the first input of the second adder, the second input of which is connected to the output of a linear prediction subunit.

EFFECT: reduced hardware costs when predicting an input process.

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Description

The invention relates to automation and computer technology and can be used to predict stationary and non-stationary random processes, improve the quality and accuracy of control in digital control systems and guidance of various (including ballistic) objects.

A device for adaptive extrapolation (forecast) according to ed. St. USSR No. 1572281, IPC G06F 15/353, 1988), comprising a smoothing unit, an extrapolation (forecast) unit, comprising three subtractors, a prediction time setting register, an output adder for calculating a quadratic forecast, and a first derivative estimation unit. The device is functionally limited and has a complex circuit switching nodes and blocks.

The closest in technical essence to the claimed device is the adaptive digital predictive device (selected by the prototype of the Russian Federation No. 2451328, IPC G06F 15/00, 05/20/2012, bull. No. 14), selected as a prototype, containing a smoothing unit and a forecast unit, in the structure of which includes: three subtractors, a forecast dynamics control unit, two subblocks of quadratic and linear forecasts, two subblocks of the second lead calculation at the (n-1) th and (n-2) th calculation points of the input process history and an adaptation block. This device has a relatively large amount of equipment.

The technical problem for the proposed device is to simplify the device, i.e. reduction of hardware costs during its implementation.

во второй (n-1)-й расчетной точке предыстории входного процесса из блока инверторов и сумматора, второй субблок расчета второй производной $$\left(y_{n-2}^{"}\right)$$

в третьей (n-2)-й расчетной точке предыстории входного процесса из двух последовательно соединенных сумматоров; блок адаптации, содержащий элемент ИСКЛЮЧАЮЩЕЕ ИЛИ, на оба входа которого заведены шины знаковых разрядов выходных сумматоров обоих субблоков расчета вторых производных, инвертор, первый и второй элементы И, триггер и мультиплексор, оба информационных входа которого подключены к выходам субблоков квадратичного и линейного прогнозов, а выход мультиплексора является первым информационным выходом устройства, для решения поставленной задачи на оба входа слагаемых первого сумматора субблока квадратичного прогноза заведены соответственно информационные выходы первого и второго субблоков расчета вторых производных, а выход первого сумматора подключен к первому входу второго сумматора, второй вход которого соединен с выходом субблока линейного прогноза.Therefore, in an adaptive digital predictive device, which includes: a smoothing unit containing an adder, first and second reversible counters, a single-channel smoothing subunit from a series-connected adder and register, a deviation ratio setting subunit containing a register, counter and delay element, a valid deviation subunit containing a block of inverters, two comparators and an element And, a subunit of unit increments, containing two elements And and an inverter, a subunit of control of a dynamic nature Ikoyi (sudha) comprising two of the pulse, an OR gate, a counter, three AND gates and the trigger mode, a smoothing information output unit information, the first control inputs and the timing device; a timing unit of a forecast block comprising a delay element, a trigger, a pulse generator, an AND element, and a shift register; a prediction block containing the first, second and third subtracters, each of which contains a register memory block, a multiplexer, an inverter block and an adder, a quadratic prediction block containing two series-connected adders, a linear prediction subunit from one adder, the output buses of which are assembled offset by one bit towards the lower digits, the forecast dynamics control unit, containing a register for storing the ordinates of the ordinates (calculated points) of the history of the input process, the input of which is the second the input of the device that sets the forecast time (interval), a comparator, an inverter, an AND element, and an address counter, the information output of which is connected to the address buses of the multiplexers of all three subtractors, moreover, two input buses of the node (reset bus to “0” of the address counter and its recovery bus ) are connected to the outputs of two elements AND (second and third) SUDH smoothing unit, the first subunit of the calculation of the second derivative $$\left(y_{n-\mathrm{one}}^{"}\right)$$

in the second (n-1) -th calculation point of the history of the input process from the block of inverters and the adder, the second sub-block of the calculation of the second derivative $$\left(y_{n-2}^{"}\right)$$

in the third (n-2) -th design point of the input process history from two series-connected adders; an adaptation unit containing an EXCLUSIVE OR element, on both inputs of which there are sign buses of the output adders of both subunits for calculating second derivatives, an inverter, the first and second I elements, a trigger and a multiplexer, both of which information inputs are connected to the outputs of the quadratic and linear prediction subunits, and the multiplexer output is the first information output of the device, for solving the problem on both inputs of the terms of the first adder of the quadratic prediction subunit, respectively about the information outputs of the first and second subunits for calculating second derivatives, and the output of the first adder is connected to the first input of the second adder, the second input of which is connected to the output of the linear prediction subunit.

The invention is illustrated by drawings, which depict: in Fig.1 - a block diagram of the proposed device; figure 2 is a block diagram of a smoothing unit; figure 3 is a block diagram of a single-channel anti-aliasing subunit; Fig. 4 is a block diagram of a timing unit of a forecast block; figure 5 is a block diagram of a forecast block.

The predictor operator formulas are known that are obtained analytically using approximating polynomials at four points (ordinates) of the history of the input random discrete process using the least squares method (Milne V.E. Numerical analysis. M.: IL, 1951, p. 212). The prediction operator for an approximating polynomial of the second degree (quadratic) for four historical points has the form:

$$y_{P+\mathrm{one}}=\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$\mathrm{four}$}\right.\left(9y_P-3y_{P-\mathrm{one}}-5y_{P-2}+3y_{P-3}\right),\left(\mathrm{one}\right)\left[\mathrm{TO}\mathrm{AT}\mathrm{four}\right]$$

or as a first approximation:

$$y_{P+\mathrm{one}}=\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$\mathrm{four}$}\right.\left(8y_P-2y_{n-\mathrm{one}}-\mathrm{four}{y}_{n-2}+2y_{n-3}\right),\left(2\right)\left[\mathrm{TO}\mathrm{AT}\mathrm{four}\right]$$

The prediction operator for an approximating polynomial of the first degree (linear) for four historical points has the form:

$$y_{P+\mathrm{one}}=\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$2$}\right.\left(2y_P+y_{P-\mathrm{one}}-y_{P-3}\right),\left(3\right)\left[LN\mathrm{four}\right]$$

where y _p - the first (current) calculated point (ordinate);

y _p-1 , y _p-2 , y _p-3 - respectively, the second, third and fourth design points (ordinates) of the three-level history of the input smoothed discrete sequence. In numerical analysis, this is a system of equally spaced points with a step h; in real time, h is the interval between points (ordinates), i.e. forecast time (depth) (H).

By analogy with methods for calculating finite differences for numerical differentiation, interpolation, and extrapolation, we denote:

Δy ₁ = (2y _p -y _p-1 ) - as the biodiversity of the first level of the history of the input discrete sequence, i.e. the difference between the doubled current and previous ordinates of the process;

Δy ₂ = (2y _p-1 -y _p-2 ) - biodiversity of the second level of history;

∆y ₃ = (2y _p-1 -y _p-3 ) - biodiversity of the third level of history.

After transforming equations (2) and (3) in order to simplify and taking into account biodiversity, we obtain the following empirical expressions for the quadratic and linear prediction operators:

$$y_{n+\mathrm{one}}=\Delta y_{\mathrm{one}}+\Delta y_2-\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$2$}\right.\left(\Delta y_3+y_{n-\mathrm{one}}\right),\left(\mathrm{four}\right)\left[\mathrm{TO}\mathrm{AT}\mathrm{four}\right]$$

$$y_{n+\mathrm{one}}=\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$2$}\right.\left(\Delta y_{\mathrm{one}}+\Delta y_{31}\right),\left(5\right)\left[LN\mathrm{four}\right]$$

Known formulas for numerical differentiation for equally spaced points expressed in terms of the function values at these points (J. Pollard. Handbook of Computational Methods of Statistics. M .: FS, 1982, p. 62), in particular for four points we have:

$$y_{n-\mathrm{one}}^{"}={\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$h$}\right.}^2\left(y_n-2y_{n-\mathrm{one}}+y_{n-2}\right),\left(6\right)$$

$$y_{n-2}^{"}={\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$h$}\right.}^2\left(y_{n-\mathrm{one}}-2y_{n-2}+y_{n-3}\right),\left(7\right)$$

Taking into account biodiversity, formulas (6) and (7) will be rewritten as follows:

$$y_{n-\mathrm{one}}^{"}={\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$h$}\right.}^2\left(y_n-2y_{n-\mathrm{one}}+y_{n-2}\right)={\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$h$}\right.}^2\left(y_n-\Delta y_2\right),\left(8\right)$$

$$y_{n-2}^{"}={\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$h$}\right.}^2\left(y_{n-\mathrm{one}}-2y_{n-2}+y_{n-3}\right),\left(9\right)$$

The proposed device implements the prediction operator according to formula (5) and the calculation of the second derivatives according to equations (8) and (9), the main elements of the circuit being the adder and the inverter unit, and the multiplication of the coefficients by the terms is carried out by the corresponding mounting shifts of the latter buses when entering into the adder. Such operations on the block diagram (see figure 5) are indicated by a circle.

):We calculate the sum of the three equations (5), (6) and (7), and in the last two we use only modules (without dimension coefficients $${\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$h$}\right.}^2$$

):

или $$y_{n+\mathrm{one}}\left[LN\mathrm{four}\right]+\left[y_{n-\mathrm{one}}^{"}\right]+\left[y_{n-2}^{"}\right]=\Delta y_{\mathrm{one}}+\Delta y_2-\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$2$}\right.\left(\Delta y_3+y_{n-\mathrm{one}}\right)$$

or

$$y_{n+\mathrm{one}}=y_{n+\mathrm{one}}\left[LN\mathrm{four}\right]+\left[y_{n-\mathrm{one}}^{"}\right]+\left[y_{n-2}^{"}\right].\left(10\right)\left[\mathrm{TO}\mathrm{AT}\mathrm{four}\right]$$

The obtained summation result (10) is identical to equation (4) for the quadratic forecast yn + i [КВ4], however, to implement equation (10), one adder less is required, i.e. solves the problem of simplifying the device.

The device contains (see Fig. 1) a smoothing block 1, a forecast block 2 and an adaptation block 3. The smoothing block 1 (see RF patent No. 2444123, IPC H03H 17/04, February 27, 2012, Bull. No. 6) contains (see 2) an adder 4, a subunit 5 of actual deviations, comprising a block of inverters 6, two comparators 7.1 and 7.2 and an element And 8, a first reversible counter 9, a subunit 10 for setting the deviation ratio, comprising a register 11, a counter 12 and a delay element 13, subunit 14 of unit increments, comprising an inverter 15 and two elements And 16.1 and 16.2, a second reversible counter 17, a dynamic control subunit 18 a characteristic comprising two pulse shapers 19.1 and 19.2, an OR element 20, a counter 21, three AND elements 22.1, 22.2, 22.3 and a mode 23 trigger; information input 24 of the smoothing unit and the device, the first control 25 and clocking 26 inputs of the device and the smoothing unit; single-channel smoothing subunit 27 (see ed. St. USSR No. 748417, class G06F 15/32, 1980), comprising (see FIG. 3) adder 28 and register 29 connected in series; information output 30. The timing unit 31 of the forecast block contains (see FIG. 4) a delay element 32, a trigger 33, a pulse generator 34, an And 35 element and a shift register 36. Prediction block 2 (see FIG. 5) contains the first 37, the second 38 and third 39 subtractors, each of which contains a block of register memory 40 from (A) series-connected registers 41, a multiplexer 42, a block of inverters 43 (assuming that the multiplexer does not have inverse outputs) and an adder 44; a quadratic prediction subunit 45 containing the first 46 and second 47 adders, the output of the latter is the information output of the subunit; a linear prediction subunit 48 comprising an adder 49; node 50 control the forecast dynamics, containing a register 51 storing the address (A) of the ordinates of the calculated points of the process history, the input 52 of which is the second control input of the device that sets the forecast time H = AT (T is the cycle of the device, A is the maximum address of the memory register 41 blocks 40), a comparator 53, an inverter 54, an AND element 55, and an address counter 56; a subunit 57 for calculating the second derivative in the second (n-1) -th calculation point of the input process history, consisting of a block of inverters 58, an adder 59 and a second information output 60 of the device, a subunit 61 for calculating the second derivative in the third (n-2) -th calculation point in the history of the input process, containing the first adder 62, the second adder 63 and the third information output 64 of the device. The adaptation unit 3 contains (see FIG. 5) an element EXCLUSIVE OR 65, an inverter 66, two elements AND 67.1 and 67.2, a trigger 68, a multiplexer 69 and a first information output 70 of the device.

The cycle of the device consists of 5 cycles. The smoothing unit 1 operates in two modes: stationary and dynamic (transitional), and all operations are performed in it in one (1st) cycle. In stationary mode, the unit smooths the input random discrete process, the deterministic basis (median) of which can have a constant, linear or non-linear (quadratic) character of change in time. The smoothing unit 1 (see figure 2) implements the following modification of the operator of signature exponential smoothing:

$$y_n=y_{n-\mathrm{one}}+sign\left[\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$K$}\right.\left(x_n-y_{n-\mathrm{one}}\right)\right],\left(\mathrm{eleven}\right)$$

where x _n and y _n are the input and output discrete;

α = 1 / K is the smoothing parameter, K is the adaptation parameter;

∆x _n = (x _n -y _n-1 ) - current deviations from the median of the process.

As a criterion for the efficiency (accuracy) of smoothing, the ratio d between zero and actual deviations Δx _{n is} chosen. The latter form the current unit increments of both signs of the output discrete in accordance with the signature function in (11):

sign [∆x _n / K] = 0 for [∆x _n -K] <0 (∆x _n are zero deviations),

sign [∆x _n / K] = 1 for [∆x _n -K]> 0 (∆x _n are real deviations).

In stationary mode (D = 0 - a sign of mode), block 1 smoothes the input random sequence of discretes to the level specified by the relation d (real range d = 7 ÷ 190), which is entered before starting the device from input 25 to register 11 of subunit 10 of the ratio deviations. The latter is a controllable frequency divider, for example, at d = 7, the output of the direct transfer of counter 12 appears every seventh clock pulse from input 26, which through the delay element 13 overwrites the inverse code d from register 11 to counter 12 (for the next cycle of the divider) and subtracts “1” from the first reverse counter 9 containing the adaptation parameter code K. The adaptive smoothing process is as follows. Let (for a certain code K in counter 9), the variance of the input discrete process increase, i.e. the number of actual deviations ∆x _n (of both signs) increased. After comparing them with the adaptation parameter K at the output of the comparator blocks 7.1 and 7.2 of subunit 5 (playing the role of negative feedback), logical “1” is set (the mode of operation of the comparators: [∆x _n > K] = “1”, [∆x _n < K] = "0") received at the input of element And 8. Since in the stationary mode the trigger of mode 23 is in the state "0" (D = 0), from its inverse output to the first input of element And 8 of subunit 5 logical "1". A high level of the signal at all inputs of the And 8 element allows the passage of clock pulses from input 26 to the summing input of the first reverse counter 9 (the K code in the last increases) and to the second inputs of the And 16.1 and 16.2 elements of the subunit of unit increments 14. The signal from the output of one of them (depending on the sign of the deviation) is fed to the summing (or subtracting) input of the second reverse counter 17 of the smoothing result, i.e. the signature function (11) is implemented. The growth process K will lead to a decrease in the number of actual deviations and will continue until a dynamic equilibrium sets in, i.e. the number of pulses received from the subunit 10 to the subtracting input of the counter 9 will be equal to the number of pulses received at its summing input from the subunit 5, and the variance of the output smoothed discrete sequence will remain unchanged (for d = 7: there must be seven zero deviations for one real deviation).

, т.е. с минимальной степенью сглаживания и, соответственно, с минимальным фазовым сдвигом (запаздыванием) выходной дискреты. Субблок 27 работает на обоих режимах, инициируется тактовыми импульсами со входа 26 в регистре 29, но используется только на переходном (динамическом) режиме. Для стационарного случайного процесса вероятность появления серии, например, из m=8 (восьми) отклонений от медианы (детерминированной основы) процесса одного знака подряд в соответствии с геометрическим законом распределения вероятностей равна:Transient (dynamic) mode can be caused by starting, accelerating, bending, switching from one stationary mode to another, etc., i.e. an almost abrupt change in the process. To smooth the input discrete sequence in transient (dynamic) modes (D = l), a single-channel smoothing subunit 27 is used (see Fig. 3), which implements the following exponential smoothing operator: $$y_n=\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$2$}\right.\left(x_n+y_{n-\mathrm{one}}\right)$$

, i.e. with a minimum degree of smoothing and, accordingly, with a minimum phase shift (delay) of the output discrete. Subunit 27 operates in both modes, is initiated by clock pulses from input 26 in register 29, but is used only in transition (dynamic) mode. For a stationary random process, the probability of a series appearing, for example, from m = 8 (eight) deviations from the median (deterministic basis) of a single sign in a row in accordance with the geometric law of probability distribution is equal to:

$$P\left(x=m\right)={\left(\raisebox{1ex}{$\mathrm{one}$}\!\left/ \!\raisebox{-1ex}{$2$}\right.\right)}^m=\mathrm{one}/256\approx 0.004$$

those. so small that the appearance of such a series can be considered the beginning of a transitional regime. Subunit 18 captures such a series and works as follows. Since for the stationary mode the deviations of different signs are most likely, when the sign in the adder 4 changes from “plus” to “minus” and vice versa, the pulse shapers 19.1 or 19.2 are triggered and through the element OR 20 they reset counter 21 and trigger 23 to “0” (D = 0). In the dynamic mode (shapers 19 do not work), eight pulses will certainly come to the counter 21 (for example, 4-bit) from the clock input 26. At the output of the high-order bit of the counter 21, a logical “1” will be set, the high level of which will ensure passage through the first element And 22.1 clock pulse, which sets the trigger of mode 23 to "1" (D = 1). The last signal from the inverse output will block the operation of the subunit 5 of the actual deviations and, accordingly, the subunit of 14 unit increments, and by the high level of the direct output signal it will allow the discretization from the single-channel smoothing subunit 27 to the second reversal counter 17 of the smoothing result through the second element And 22.2.

At the end of the transition mode, in the adder 4, deviations of different signs will inevitably occur, which will lead to the operation of the pulse shapers 19 and, accordingly, to the switching of the trigger of mode 23 to the state “0” (stationary smoothing mode, D = 0).

Forecasting operations are performed in three cycles, respectively, 2nd, 3rd and 4th. They are formed by a series of three clock pulses from the clock node 31 (see figure 4). A clock pulse from input 26 resets trigger 33 and writes “1” to the least significant bit of the shift register 36. The same clock pulse, delayed by delay element 32, sets trigger 33 to “1”, thereby allowing pulses from generator 34 to pass through element I 35 in the shift register 36, on the tires of the least significant bits of which ("a", "b", "c", "g") the above series appears. In the 2nd step, the ordinate of the current (first) calculated point y _p is recorded in the first register 41 of the block 40 of the register memory of the first subtractor 37. At the same time, all previous ordinates are overwritten (shifted) to neighboring registers 41 (i.e., the background of the input process is formed ) The address input of the multiplexer 42 receives the address code of the history ordinate (A) from the address counter 58, which is equal to the address code recorded from the second control input 54 in the address storage register 53 before the device starts operation and determines the forecast time (interval) Н = AT. In accordance with this address, the ordinate from the output of the multiplexer 42 (already as the second calculation point y _p-1 ) through the inverter block 43 is fed to the input of the second term of the adder 44, the first term of which is doubled the ordinate of the previous calculation point y _p . The output of the adder of the first subtractor 37 establishes the biodiversity of the 1st level of the history of the input discrete sequence. In the 3rd and 4th steps, operations are performed similar to those described above, but for the second 38 and third 39 subtractors, the outputs of which are set respectively biodities of the 2nd and 3rd levels of history. All adders in the device are combination. At the end of the 4th cycle, at the output of subunit 45, in accordance with the empirical formula (10), a quadratic (non-linear) prediction estimation code for a non-stationary discrete input sequence is set, and at the output of subunit 48, in accordance with formula (5), a linear prediction estimation code for a stationary or a slowly varying input discrete sequence, the output 60 of subunit 57 in accordance with formula (8) is the code for evaluating the second derivative at the second (n-1) -th design point of the input process history, and the output is 64 subunits 61 according to formula (9) - the second derivative of code evaluation in the third (n-2) -th design point history input process.

In the 5th step, the signal from the output (“g”) of the shift register 36 of the clock unit 31, depending on the combination of the signs of the second derivatives, sets the trigger 68 of the adaptation unit 3 to the state “1” (quadratic forecast) or to “0” (linear forecast) . The direct output of the trigger 68, as the address input of the multiplexer 69, provides selection and transmission to its only output 70 of the multiplexer and the device of the corresponding forecast estimation code.

The forecast dynamics control unit 50 is designed to exclude the forecast operation in dynamic (transient) modes (D = l) of the device operation by resetting the address counter 56 to a “0” by a clock signal (U ₀ ) from the sub-block 18 of the dynamic characteristic control of the smoothing block. The zero address of the counter 56 on the address buses of all three multiplexers 42 of the subtractor will ensure the calculation and installation of the current discrete code y _{n of a} minimally smoothed input process at the outputs of both prediction subunits 45 and 48. With the transition of the device to the stationary mode of operation (D = 0), the trigger of mode 23 of subunit 18 will allow the clock pulse to pass from input 26 through open element And 55 to the counting input (U _a ) of address counter 56. As the address increases in the latter at the outputs of both prediction subunits 45 and 48, codes (y _{n + 1} ) of the predicted input process are set using information from a three-level history only for the new stationary mode. The growth of the address code h in the counter 56 (h = aT, a = 1, 2, 3, ... A), i.e. the restoration of the specified forecast time H will continue with each cycle until it becomes equal to the value set in the storage register 51 h = H. The comparator 53 (operating mode: [H = h] → “1”, [H ≠ h] → “0”) in this case, through the key 54 and the AND 55 element, it closes the counting input of the address counter 56.

The use of both prediction operators for monitoring, tracking, or controlling parameters in technical systems is based on fundamental physical laws: the law of inertia, the laws of conservation of energy and motion, the inertia of heating / cooling processes, etc., which allows (based on the background of the process) to rely on a high degree reliability of the forecast. The accuracy of the forecast can be judged only at the end of the event and if during the period of time (interval) of the forecast there were no force majeure circumstances: blow, jump, explosion, etc.

Claims (1)

An adaptive digital predictive device, which includes: a smoothing unit containing an adder, first and second reverse counters, a single-channel smoothing subunit from a series-connected adder and register, a deviation ratio setting subunit containing a register, a counter and a delay element, a valid deviation subunit containing a block of inverters, two comparators and an element And, a subunit of unit increments containing two elements And and an inverter, a subunit of control of the dynamic characteristic (COURT ) Containing two pulses driver, an OR gate, a counter, three AND gates and the trigger mode, a smoothing information output unit information, the first control inputs and the timing device; a timing unit of a forecast block comprising a delay element, a trigger, a pulse generator, an AND element, and a shift register; a prediction block containing the first, second and third subtracters, each of which contains a register memory block, a multiplexer, an inverter block and an adder, a quadratic prediction block containing two series-connected adders, a linear prediction subunit from one adder, the output buses of which are assembled offset by one bit towards the lower digits, the forecast dynamics control unit, containing a register for storing the ordinates of the ordinates (calculated points) of the history of the input process, the input of which is the second the input of the device that sets the forecast time (interval), a comparator, an inverter, an AND element, and an address counter, the information output of which is connected to the address buses of the multiplexers of all three subtractors, moreover, two input buses of the node (reset bus to “0” of the address counter and its recovery bus ) are connected to the outputs of two elements AND (second and third) SUDH smoothing unit, the first subunit of the calculation of the second derivative

in the second (n-1) -th calculation point of the history of the input process from the block of inverters and the adder, the second sub-block of the calculation of the second derivative

in the third (n-2) -th design point of the input process history from two series-connected adders; an adaptation unit containing an EXCLUSIVE OR element, on both inputs of which there are sign buses of the output adders of both subunits for calculating second derivatives, an inverter, the first and second I elements, a trigger and a multiplexer, both of which information inputs are connected to the outputs of the quadratic and linear prediction subunits, and the multiplexer output is the first information output of the device, characterized in that the information on the two inputs of the terms of the first adder of the quadratic prediction subunit tional outputs of the first and second subunits calculate the second derivatives, and the output of the first adder is connected to a first input of the second adder, a second input coupled to an output of the linear prediction subunit.

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