RU2603435C2 - Устройство с переходными отверстиями в подложке и способ его производства - Google Patents

Устройство с переходными отверстиями в подложке и способ его производства Download PDF

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RU2603435C2
RU2603435C2 RU2014119923/28A RU2014119923A RU2603435C2 RU 2603435 C2 RU2603435 C2 RU 2603435C2 RU 2014119923/28 A RU2014119923/28 A RU 2014119923/28A RU 2014119923 A RU2014119923 A RU 2014119923A RU 2603435 C2 RU2603435 C2 RU 2603435C2
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RU
Russia
Prior art keywords
substrate
grooves
conductive layer
vias
groove
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RU2014119923/28A
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English (en)
Russian (ru)
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RU2014119923A (ru
Inventor
Роналд ДЕККЕР
Боут МАРСЕЛИС
Марсель МЮЛДЕР
Рюдигер МАУКЗОК
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Конинклейке Филипс Н.В.
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Application granted granted Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B06—GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
    • B06B—METHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
    • B06B1/00—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
    • B06B1/02—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy
    • B06B1/0292—Electrostatic transducers, e.g. electret-type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0245—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising use of blind vias during the manufacture
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
    • H10W20/2125—Top-view shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4451—Semiconductor materials, e.g. polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/244—Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/922—Bond pads being integral with underlying chip-level interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Transducers For Ultrasonic Waves (AREA)
  • Micromachines (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
RU2014119923/28A 2011-10-17 2012-10-12 Устройство с переходными отверстиями в подложке и способ его производства RU2603435C2 (ru)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201161547942P 2011-10-17 2011-10-17
US61/547,942 2011-10-17
PCT/IB2012/055547 WO2013057642A1 (en) 2011-10-17 2012-10-12 Through-wafer via device and method of manufacturing the same

Publications (2)

Publication Number Publication Date
RU2014119923A RU2014119923A (ru) 2015-11-27
RU2603435C2 true RU2603435C2 (ru) 2016-11-27

Family

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RU2014119923/28A RU2603435C2 (ru) 2011-10-17 2012-10-12 Устройство с переходными отверстиями в подложке и способ его производства

Country Status (6)

Country Link
US (1) US9230908B2 (enExample)
EP (1) EP2745315A1 (enExample)
CN (1) CN103875068B (enExample)
IN (1) IN2014CN02550A (enExample)
RU (1) RU2603435C2 (enExample)
WO (1) WO2013057642A1 (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6069798B2 (ja) * 2011-12-20 2017-02-01 コーニンクレッカ フィリップス エヌ ヴェＫｏｎｉｎｋｌｉｊｋｅ Ｐｈｉｌｉｐｓ Ｎ．Ｖ． 超音波トランスデューサデバイス及びこれを製造する方法
US10586753B2 (en) 2014-03-31 2020-03-10 Koninklijke Philips N.V. IC die, ultrasound probe, ultrasonic diagnostic system and method
WO2016147529A1 (ja) * 2015-03-16 2016-09-22 富士電機株式会社 半導体装置の製造方法
US11097942B2 (en) * 2016-10-26 2021-08-24 Analog Devices, Inc. Through silicon via (TSV) formation in integrated circuits
US10856844B2 (en) * 2018-05-03 2020-12-08 Butterfly Network, Inc. Vertical packaging for ultrasound-on-a-chip and related methods

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6430109B1 (en) * 1999-09-30 2002-08-06 The Board Of Trustees Of The Leland Stanford Junior University Array of capacitive micromachined ultrasonic transducer elements with through wafer via connections
RU2419179C2 (ru) * 2006-12-20 2011-05-20 Интел Корпорейшн Устройство интегральной схемы и способ изготовления устройства интегральной схемы

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US5381385A (en) 1993-08-04 1995-01-10 Hewlett-Packard Company Electrical interconnect for multilayer transducer elements of a two-dimensional transducer array
US5619476A (en) * 1994-10-21 1997-04-08 The Board Of Trustees Of The Leland Stanford Jr. Univ. Electrostatic ultrasonic transducer
US6716737B2 (en) * 2002-07-29 2004-04-06 Hewlett-Packard Development Company, L.P. Method of forming a through-substrate interconnect
US20040104454A1 (en) 2002-10-10 2004-06-03 Rohm Co., Ltd. Semiconductor device and method of producing the same
US6836020B2 (en) 2003-01-22 2004-12-28 The Board Of Trustees Of The Leland Stanford Junior University Electrical through wafer interconnects
US7257051B2 (en) * 2003-03-06 2007-08-14 General Electric Company Integrated interface electronics for reconfigurable sensor array
JP2005032769A (ja) * 2003-07-07 2005-02-03 Seiko Epson Corp 多層配線の形成方法、配線基板の製造方法、デバイスの製造方法
WO2005088699A1 (en) 2004-03-10 2005-09-22 Koninklijke Philips Electronics N.V. Method of manufacturing an electronic device and a resulting device
JP5275565B2 (ja) 2004-06-07 2013-08-28 オリンパス株式会社 静電容量型超音波トランスデューサ
JP2008541473A (ja) 2005-05-18 2008-11-20 コロ テクノロジーズ インコーポレイテッド 貫通ウェーハ相互接続
US7622848B2 (en) 2006-01-06 2009-11-24 General Electric Company Transducer assembly with z-axis interconnect
WO2008001282A2 (en) 2006-06-26 2008-01-03 Koninklijke Philips Electronics, N.V. Flip-chip interconnection with a small passivation layer opening
WO2008038183A1 (en) 2006-09-25 2008-04-03 Koninklijke Philips Electronics N.V. Flip-chip interconnection through chip vias
CA2667751A1 (en) * 2006-11-03 2008-05-08 Research Triangle Institute Enhanced ultrasound imaging probes using flexure mode piezoelectric transducers
US7843022B2 (en) 2007-10-18 2010-11-30 The Board Of Trustees Of The Leland Stanford Junior University High-temperature electrostatic transducers and fabrication method
US7781238B2 (en) 2007-12-06 2010-08-24 Robert Gideon Wodnicki Methods of making and using integrated and testable sensor array
US8062975B2 (en) * 2009-04-16 2011-11-22 Freescale Semiconductor, Inc. Through substrate vias

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6430109B1 (en) * 1999-09-30 2002-08-06 The Board Of Trustees Of The Leland Stanford Junior University Array of capacitive micromachined ultrasonic transducer elements with through wafer via connections
RU2419179C2 (ru) * 2006-12-20 2011-05-20 Интел Корпорейшн Устройство интегральной схемы и способ изготовления устройства интегральной схемы

Also Published As

Publication number Publication date
RU2014119923A (ru) 2015-11-27
US20140293751A1 (en) 2014-10-02
WO2013057642A1 (en) 2013-04-25
CN103875068B (zh) 2018-07-10
US9230908B2 (en) 2016-01-05
CN103875068A (zh) 2014-06-18
IN2014CN02550A (enExample) 2015-08-07
EP2745315A1 (en) 2014-06-25

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