RU2603435C2 - Устройство с переходными отверстиями в подложке и способ его производства - Google Patents

Устройство с переходными отверстиями в подложке и способ его производства Download PDF

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RU2603435C2
RU2603435C2 RU2014119923/28A RU2014119923A RU2603435C2 RU 2603435 C2 RU2603435 C2 RU 2603435C2 RU 2014119923/28 A RU2014119923/28 A RU 2014119923/28A RU 2014119923 A RU2014119923 A RU 2014119923A RU 2603435 C2 RU2603435 C2 RU 2603435C2
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substrate
grooves
conductive layer
vias
groove
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RU2014119923/28A
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English (en)
Russian (ru)
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RU2014119923A (ru
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Роналд ДЕККЕР
Боут МАРСЕЛИС
Марсель МЮЛДЕР
Рюдигер МАУКЗОК
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Конинклейке Филипс Н.В.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B06—GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
    • B06B—METHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
    • B06B1/00—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
    • B06B1/02—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy
    • B06B1/0292—Electrostatic transducers, e.g. electret-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0237—Disposition of the redistribution layers
    • H01L2224/02372—Disposition of the redistribution layers connecting to a via connection in the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05541—Structure
    • H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1302—Disposition
    • H01L2224/13024—Disposition the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/146—Mixed devices
    • H01L2924/1461—MEMS

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Transducers For Ultrasonic Waves (AREA)
  • Micromachines (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Combinations Of Printed Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
RU2014119923/28A 2011-10-17 2012-10-12 Устройство с переходными отверстиями в подложке и способ его производства RU2603435C2 (ru)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201161547942P 2011-10-17 2011-10-17
US61/547,942 2011-10-17
PCT/IB2012/055547 WO2013057642A1 (en) 2011-10-17 2012-10-12 Through-wafer via device and method of manufacturing the same

Publications (2)

Publication Number Publication Date
RU2014119923A RU2014119923A (ru) 2015-11-27
RU2603435C2 true RU2603435C2 (ru) 2016-11-27

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RU2014119923/28A RU2603435C2 (ru) 2011-10-17 2012-10-12 Устройство с переходными отверстиями в подложке и способ его производства

Country Status (6)

Country Link
US (1) US9230908B2 (enExample)
EP (1) EP2745315A1 (enExample)
CN (1) CN103875068B (enExample)
IN (1) IN2014CN02550A (enExample)
RU (1) RU2603435C2 (enExample)
WO (1) WO2013057642A1 (enExample)

Families Citing this family (5)

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BR112014014911A2 (pt) * 2011-12-20 2017-06-13 Koninklijke Philips Nv dispositivo transdutor de ultrassom; e método de fabricação de um dispositivo transdutor de ultrassom
US10586753B2 (en) 2014-03-31 2020-03-10 Koninklijke Philips N.V. IC die, ultrasound probe, ultrasonic diagnostic system and method
JP6304445B2 (ja) * 2015-03-16 2018-04-04 富士電機株式会社 半導体装置の製造方法
US11097942B2 (en) * 2016-10-26 2021-08-24 Analog Devices, Inc. Through silicon via (TSV) formation in integrated circuits
WO2019213448A1 (en) * 2018-05-03 2019-11-07 Butterfly Network, Inc. Vertical packaging for ultrasound-on-a-chip and related methods

Citations (2)

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Publication number Priority date Publication date Assignee Title
US6430109B1 (en) * 1999-09-30 2002-08-06 The Board Of Trustees Of The Leland Stanford Junior University Array of capacitive micromachined ultrasonic transducer elements with through wafer via connections
RU2419179C2 (ru) * 2006-12-20 2011-05-20 Интел Корпорейшн Устройство интегральной схемы и способ изготовления устройства интегральной схемы

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US5381385A (en) 1993-08-04 1995-01-10 Hewlett-Packard Company Electrical interconnect for multilayer transducer elements of a two-dimensional transducer array
US5619476A (en) * 1994-10-21 1997-04-08 The Board Of Trustees Of The Leland Stanford Jr. Univ. Electrostatic ultrasonic transducer
US6716737B2 (en) 2002-07-29 2004-04-06 Hewlett-Packard Development Company, L.P. Method of forming a through-substrate interconnect
US20040104454A1 (en) * 2002-10-10 2004-06-03 Rohm Co., Ltd. Semiconductor device and method of producing the same
US6836020B2 (en) 2003-01-22 2004-12-28 The Board Of Trustees Of The Leland Stanford Junior University Electrical through wafer interconnects
US7257051B2 (en) * 2003-03-06 2007-08-14 General Electric Company Integrated interface electronics for reconfigurable sensor array
JP2005032769A (ja) * 2003-07-07 2005-02-03 Seiko Epson Corp 多層配線の形成方法、配線基板の製造方法、デバイスの製造方法
WO2005088699A1 (en) * 2004-03-10 2005-09-22 Koninklijke Philips Electronics N.V. Method of manufacturing an electronic device and a resulting device
JP5275565B2 (ja) 2004-06-07 2013-08-28 オリンパス株式会社 静電容量型超音波トランスデューサ
EP1883956A4 (en) 2005-05-18 2011-03-23 Kolo Technologies Inc BY-THE-WAFER CONNECTION
US7622848B2 (en) 2006-01-06 2009-11-24 General Electric Company Transducer assembly with z-axis interconnect
JP2009542029A (ja) 2006-06-26 2009-11-26 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 小さいパッシベーション層の開口を有するフリップチップ相互接続
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KR20130014619A (ko) * 2006-11-03 2013-02-07 리써치 트라이앵글 인스티튜트 굴곡 모드 압전 트랜스듀서를 사용하는 보강된 초음파 촬영 프로브
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Publication number Priority date Publication date Assignee Title
US6430109B1 (en) * 1999-09-30 2002-08-06 The Board Of Trustees Of The Leland Stanford Junior University Array of capacitive micromachined ultrasonic transducer elements with through wafer via connections
RU2419179C2 (ru) * 2006-12-20 2011-05-20 Интел Корпорейшн Устройство интегральной схемы и способ изготовления устройства интегральной схемы

Also Published As

Publication number Publication date
IN2014CN02550A (enExample) 2015-08-07
CN103875068A (zh) 2014-06-18
CN103875068B (zh) 2018-07-10
EP2745315A1 (en) 2014-06-25
WO2013057642A1 (en) 2013-04-25
US9230908B2 (en) 2016-01-05
RU2014119923A (ru) 2015-11-27
US20140293751A1 (en) 2014-10-02

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