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SUBSTANCE: invention relates to computer engineering and can be used in making arithmetic units and carrying out arithmetic operations, particularly summation and subtraction processes in position-sign codes. The device contains four AND elements, two OR elements, and three NOT elements.
EFFECT: more functional capabilities.
3 dwg
Description
Текст описания приведен в факсимильном виде.
The text of the description is given in facsimile form.
Claims (1)
Функциональная структура логического дифференцирования аргументов аналоговых сигналов, эквивалентных двоичному коду, условно «i» разряд которого содержит две логические функции
и функцию f1(&)-И, первая функциональная связь функции f1(&)-И является выходной функциональной связью логической функции
функциональная входная связь которой является входом приема аналогового сигнала ni «i» разряда, отличающаяся тем, что в условно «i» разряд введены три дополнительные логические функции f2(&)-И, f3(&)-И, f4(&)-И и две логические функции f1(})-ИЛИ и f2(})-ИЛИ, при этом функциональные связи в функциональной структуре логического дифференцирования выполнены в соответствии с математической моделью вида
Functional structure of logical differentiation of arguments of analog signals equivalent to binary code, conditionally “i” bit of which contains two logical functions
and the function f 1 (&) - And, the first functional relationship of the function f 1 (&) - And is the output functional relationship of the logical function
a functional input connection of which is an input for receiving an analog signal of the ni “i” discharge, characterized in that three additional logical functions f 2 (&) - And, f 3 (&) - And, f 4 (& ) -And and two logical functions f 1 (}) - OR and f 2 (}) - OR, while the functional relationships in the functional structure of logical differentiation are made in accordance with a mathematical model of the form
RU2006144611/09A2006-12-152006-12-15Method of logical differentiation of analogue signals equivalent to binary code and device to this end
RU2361269C9
(en)
FUNCTIONAL STRUCTURE OF A TRANSFORMER OF POSITIONAL SYMBOLIC STRUCTURE OF ANALOG SIGNALS ARGUMENTS «±»[ni]f(-1\+1,0,…+1) "ADDITIONAL CODE" INTO FUNCTIONAL STRUCTURE OF CONDITIONALLY NEGATIVE ANALOG SINGALS ARGUMENTS «-»[ni]f(2n) USING ARITHMETICAL ACSIOMS OF TERNARY NOTATION f(+1,0,-1) (VARIANTS)
FUNCTIONAL STRUCTURE OF ADDER fi(Σ) OF ARBITRARY "i" BIT FOR LOGIC-DYNAMIC PROCESS OF SUMMATION OF POSITIONAL ARGUMENTS OF TERMS [ni]f(2n) and [mi]f(2n) USING ARITHMETIC AXIOMS OF TERNARY NUMBER SYSTEM f(+1,0,-1) (VERSIONS OF RUSSIAN LOGIC)
FUNCTIONAL STRUCTURE OF PARALLEL ADDER FOR MULTIPLICATION, WHEREIN ARGUMENTS OFTERMS OF PARTIAL PRODUCTS ARE ARGUMENTS OF TERNARY NUMBER SYSTEM f(+1,0,-1) IN POSITIONAL-SIGN FORMAT THEREOF f(+/-) (VERSIONS)
FUNCTIONAL STRUCTURE FOR LOGIC-DYNAMIC PROCESS OF SERIAL END-TO-END ACTIVATION OF INACTIVE ARGUMENTS "0" OF SECOND INTERMEDIATE SUM +[S2 i]f(&) -AND IN ADDER f(Σ) WITH TRANSFORMATION OF POSITIONAL ARGUMENTS OF TERMS [ni]f(2n) AND [mi]f(2n) (VERSIONS)
f3 ADDER FUNCTIONAL STRUCTURE (ΣCD) OF ARBITRARY "g" DIGIT IMPLEMENTING DECODING PROCEDURE FOR ARGUMENTS OF SUMMANDS [1,2Sg h1]f(2n) AND [1,2Sg h2]f(2n) OF POSITION FORMAT "EXTRA CODE RU" BY ARITHMETIC AXIOMS OF TERNARY NOTATION f(+1,0,-1) AND DOUBLE LOGICAL DIFFERENTIATION d1,2/dn → f1,2(+←↓-)d/dn OF ACTIVE ARGUMENTS OF "LEVEL 2" AND REMOVAL OF ACTIVE LOGICAL ZEROES "+1""-1"→"0" IN "LEVEL 1" (VERSIONS OF RUSSIAN LOGIC)
FUNCTIONAL STRUCTURE OF POSITION-SIGN ACCUMULATOR f(+/-) FOR COMBINATORIAL MULTIPLIER WHERE SUBPRODUCT OUTPUT ARGUMENTS ARE REPRESENTED IN BINARY FORMAT f(2n) (VERSIONS)
FUNCTIONAL STRUCTURE OF ADDER f2(ΣCD) OF CONDITIONAL "k" BIT OF PARALLEL-SERIAL MULTIPLIER fΣ(ΣCD), IMPLEMENTING PROCEDURE FOR "DECRYPTION" OF INPUT STRUCTURES OF ARGUMENTS OF TERMS [1,2Sj h1]f(2n) AND [1,2Sj h2]f(2n) OF "COMPLEMENTARY CODE RU" POSITIONAL FORMAT BY APPLYING ARITHMETIC AXIOM OF TERNARY NUMBER SYSTEM f(+1,0,-1) AND LOGIC DIFFERENTIATION d1/dn → f1(+←↓-)d/dn OF ARGUMENTS IN COMBINED STRUCTURE THEREOF (VERSIONS OF RUSSIAN LOGIC)
FUNCTIONAL STRUCTURE OF PROCEDURE OF CONVERTING POSITION CONDITIONALLY NEGATIVE ARGUMENTS «-»[ni]f(2n) INTO STRUCTURE OF ARGUMENTS "COMPLEMENTARY CODE" OF POSITION-SIGN FORMAT USING ARITHMETIC AXIOMS OF TERNARY NUMBER SYSTEM f(+1,0,-1) (VERSIONS)
FUNCTIONAL OUTPUT STRUCTURE OF CONDITIONAL BIT "j" OF ADDER fCD(Σ)RU WITH MAXIMALLY MINIMISED PROCESS CYCLE ∆tΣ FOR ARGUMENTS OF TERMS OF INTERMEDIATE ARGUMENTS (2Sj)2 d1/dn "LEVEL 2" AND (1Sj)2 d1/dn "LEVEL 1" OF SECOND TERM AND INTERMEDIATE ARGUMENTS (2Sj)1 d1/dn "LEVEL 2" AND (1Sj)1 d1/dn "LEVEL 1" OF FIRST TERM OF "COMPLENTARY CODE RU" FORMAT WITH GENERATION OF RESULTANT ARGUMENTS OF SUM (2Sj)f(2n) "LEVEL 2" AND (1Sj)f(2n) "LEVEL 1" IN SAME FORMAT (VERSIONS OF RUSSIAN LOGIC)
FUNCTIONAL STRUCTURE OF PRE-ADDER fΣ([mj]&[mj,0]) OF PARALLEL-SERIES MULTIPLIER fΣ(Σ) WITH PROCEDURE FOR LOGIC DIFFERENTIATION d/dn OF FIRST INTERMEDIATE SUM [S1 Σ]f(})- OR STRUCTURE OF ACTIVE ARGUMENTS OF MULTIPLICAND [0,mj]f(2n) and [mj,0]f(2n) (VERSIONS)
FUNCTIONAL DESIGN OF ADDER f3(ΣCD)max OF "k" CONDITIONALLY MOST SIGNIFICANT BITS OF PARALLEL-SERIAL MULTIPLIER fΣ(ΣCD), IMPLEMENTING PROCEDURE FOR "DECRYPTION" OF ARGUMENTS OF TERMS [1,2Sg h1] AND [1,2Sg h2] "COMPLEMENTARY CODE RU" BY ARITHMETIC AXIOM OF TERNARY NUMBER SYSTEM f(+1,0,-1) AND LOGIC DIFFERENTIATION d1/dn → f1(+←↓-)d/dn (VERSIONS OF RUSSIAN LOGIC)
METHOD FOR LOGIC-DYNAMIC PROCESS OF CONVERTING POSITION CONDITIONALLY NEGATIVE ARGUMENTS OF ANALOGUE SIGNALS «-»[ni]f(2n) TO POSITION-SIGN STRUCTURE OF ARGUMENTS «±»[ni]f(-1\+1,0,…+1) "COMPLEMENTARY CODE" USING ARITHMETIC AXIOMS OF TERNARY NUMBER SYSTEM f(+1, 0,-1) (VERSIONS OF RUSSIAN LOGIC)
METHOD FOR CONVERSION OF POSITION-SYMBOLIC STRUCTURES OF +[ni]f(2n) AND -[ni]f(2n) ANALOG SIGNAL ARGUMENTS INTO ±[ni]f(2n) ANALOG SIGNAL ARGUMENTS STRUCTURE OF "ADDITIONAL CODE" USING ARITHMETIC AXIOMS OF TERNARY NOTATION f(+1, 0,-1) (VERSIONS OF RUSSIAN LOGIC)
The text of the description is given in facsimile form. 
