RU2239281C2 - Digital harmonic-wave synthesizer - Google Patents

Abstract

FIELD: radio communications engineering; heterodyne frequency shaping in radio receivers.

SUBSTANCE: proposed harmonic-wave synthesizer has clock generator, N annular shift registers, N modulo table multipliers, N controlled phase shifters, harmonic signal generator, phase detector, storage and retrieval device, and low-pass filter.

EFFECT: extended synthesized wave frequency range.

1 cl, 1 dwg

Description

The invention relates to techniques for radio communications and can be used to generate the local oscillator frequency in radio receivers.

A device (analog) is known [1, p.19, Fig. 1], which contains four code generators, a multiplexer, a digital-to-analog converter (DAC), and a low-pass filter (low-pass filter). The disadvantage of this device is the low value of the maximum frequency of the generated oscillations.

A device (analogue) is also known [2, p. 57, Fig. 3], comprising an input data and control register, a phase accumulator, a phase control register, an adder, read only memory, and a DAC. The disadvantage of this device is the low value of the maximum frequency of the generated oscillations.

The closest in technical essence (prototype to the proposed invention) is a device [3, p. 76, Fig. 3.12], containing a clock generator, accumulating the adder, read-only memory, DAC and low-pass filter.

The disadvantage of the prototype is the low value of the maximum frequency of the generated vibrations due to the limited speed of the functional elements included in its composition.

The problem to which the invention is directed, is to expand the frequency range of the synthesized oscillations.

The technical result is expressed in increasing the speed of obtaining discrete readings of generated harmonic oscillations, thereby increasing the maximum value of the synthesized frequency.

содержит m_i разрядов (m₁, m₂,..., m_N - взаимно простые целые положительные числа), выход j-го разряда

i-го КРС соединен с j-м разрядом унитарного кода первого операнда i-го

табличного умножителя по модулю, к соответствующим разрядам второго операнда которого подключен унитарный код остатка по модулю m_i значения частоты синтезатора, выходы k-го и l-го табличных умножителей по модулю (

[• ] - целая часть числа) соответственно подключены к первым входам k-го и l-го управляемых фазовращателей, при этом выход генератора гармонического сигнала соединен со вторыми входами первого (р=1) и

-го управляемых фазовращателей, выходы р-го

и q-го

управляемых фазовращателей подключены соответственно к вторым входам (р+1)-го и (q+1)-го управляемых фазовращателей, а выходы

-го и N-го управляемых фазовращателей - к первому и второму входам фазового детектора соответственно, выход которого соединен с первым входом устройства выборки и хранения, причем выход тактового генератора подключен к тактовым входам кольцевых регистров сдвига и второму входу устройства выборки и хранения, выход которого соединен с входом ФНЧ.The technical result is achieved by the fact that in the device containing a clock generator and a low-pass filter (LPF), the output of which is the output of the device, N ring shift registers (RED), N table modulators, N controlled phase shifters, a harmonic signal generator, phase are introduced a detector and a sampling and storage device, the i-th cattle

contains m _i digits (m ₁ , m ₂ , ..., m _N are coprime positive integers), the output of the jth digit

of the i-th cattle is connected to the j-th unitary code of the first operand of the i-th

modulo table multiplier, to the corresponding bits of the second operand of which is connected the unitary remainder code modulo m _{i of} the synthesizer frequency value, the outputs of the kth and lth tabular multipliers modulo (

[•] is the integer part of the number) respectively connected to the first inputs of the kth and lth controlled phase shifters, while the output of the harmonic signal generator is connected to the second inputs of the first (p = 1) and

guided phase shifters, outputs r

and q

controlled phase shifters are connected respectively to the second inputs of the (p + 1) -th and (q + 1) -th controlled phase shifters, and the outputs

of the th and Nth controlled phase shifters - to the first and second inputs of the phase detector, respectively, the output of which is connected to the first input of the sampling and storage device, and the output of the clock generator is connected to the clock inputs of the ring shift registers and the second input of the sampling and storage device, the output of which connected to the input of the low-pass filter.

The invention consists in converting a digital code of the number A into an analog harmonic signal with a frequency

based on the application of the periodicity property of a harmonic function, similar to the property of arithmetic operations modulo in an integer ring, where F _T is the clock frequency; M is a fixed positive integer.

In the inventive device, the formation of harmonic oscillations X (t) = Ucos (2π f _out t) is carried out by obtaining its samples at time t = Δ t · k, which are multiples of the clock frequency F _T = 1 / Δ t, and highlighting using the low-pass filter first harmonics of the sequence of these samples.

In view of (1), discrete samples of harmonic oscillations with amplitude U are described by the expression:

. Так как косинус - функция периодическая, то

. Следовательно, k можно формировать в пределах периода

.Where

. Since cosine is a periodic function, then

. Therefore, k can be formed within the period

.

, однозначно кодируется своими остатками а_i по основаниям m_i An arbitrary non-negative integer A can be represented in the code of the system of residual classes [4, p.12]. The system of residual classes (RNS) refers to the number of non-positional number systems in which the integer A in the range

is uniquely encoded by its residues a _i on the basis of m _i

[· ] - целая часть числа; m₁, m₂,..., m_N - совокупность взаимно простых целых положительных чисел, называемых основаниями СОК; N - число оснований.Where

[· ] - the integer part of number; m ₁ , m ₂ , ..., m _N - a set of mutually prime positive integers called the bases of RNS; N is the number of bases.

.Let in expressions (1) and (2)

.

The code in the RNS of the result of the product C of numbers A and k is determined by calculating the individual products of the residues for each base [4, p.13]

;

;

.Where

;

;

.

The product code (4) from JUICE can be converted into a positional number system based on the Chinese remainder theorem [4, p. 36]

where μ ₁ is a constant determined from the solution of comparison: (M ₁ · μ ₁ ) mod m _i ≡ 1; M _i = M / m _i .

We represent (2) in the form

, может быть получен в фазовом детекторе (ФД), на входы которого поступают гармонические сигналы с разностью фаз, прямо пропорциональной (5) [5, с.51-53]. Требуемые значения сдвига фазы могут быть сформированы с помощью N управляемых фазовращателей УФ₁...УФ_N.Discrete, equal in magnitude

, can be obtained in a phase detector (PD), at the inputs of which harmonic signals with a phase difference directly proportional to (5) are received [5, p.51-53]. The required phase shift values can be generated using N controlled phase shifters UV ₁ ... UV _N.

соответственно установить сдвиги фазы на угол

, а в управляемых фазовращателях

- на угол

, то суммарный набег фазы гармонического сигнала на выходе первой группы фазовращателей будет равенFor example, if in controlled phase shifters

set phase shifts accordingly

, and in controlled phase shifters

- on the corner

, then the total phase shift of the harmonic signal at the output of the first group of phase shifters will be equal to

and at the output of the second group

Accordingly, on the basis of (7) and (8) we obtain

.Thus, if harmonic vibrations with phase shifts Ф ₁ and Ф ₂ arrive at the PD inputs, then a voltage that is directly proportional to

.

, будет определяться частотой ГГС. При использовании ГГС миллиметрового диапазона длин волн с периодом частоты Т≈ 10^-11С, указанное время будет равно сумме времени задержки в

(или в

- при нечетном N) управляемых фазовращателях

и длительности переходного процесса в ФД (≈ (5-10)Т=(5-10)10^-11С).The time of voltage formation, directly proportional

, will be determined by the frequency of the GHS. When using the GHS of the millimeter wavelength range with a frequency period of T ≈ 10 ^-11 C, the indicated time will be equal to the sum of the delay time in

(or in

- with odd N) controlled phase shifters

and the duration of the transition process in the PD (≈ (5-10) T = (5-10) 10 ^-11 C).

.Thus, for the formation of the kth discrete sample of harmonic oscillation with a frequency f _o (1) according to formula (2), it is necessary, in accordance with the current value of the code, of the number k in the RNS (k = (χ ₁ , ..., χ _N )) calculate the residuals c _i [k] = (a _i χ _i ) mod m _{i of the} product of the frequency code A and the reference number k, set the corresponding phase shifts in UV _i (i = 1, N) and obtain the voltage in the harmonic oscillation from the GHS output PD directly proportional

.

The total execution time of these procedures will be equal to

where t _k is the time of formation in the code of the RNS of the current value of the reference number k, t _UMN is the time of multiplication of two numbers in the RNS; T is the period of the GHS frequency.

числа k по основанию m_i

представлен унитарным кодом. В данном коде применяются m_i шин данных, причем, если χ _i=0, то на шине нулевого разряда будет логическая “1”, а на остальных “0”, если χ _i=1, то на шине первого разряда - “1”, а на остальных - “0” и т.д.Let the remainder

base k m _i

represented by unitary code. In this code, m _i data buses are used, moreover, if χ _i = 0, then on the zero-bit bus there will be a logical “1”, and on the remaining “0”, if χ _i = 1, then on the bus of the first bit - “1” , and on the rest - “0”, etc.

для k=0, 1, 2, 3,..., М-1. Последовательность чисел k в коде СОК будет циклически повторяться по каждому основанию m_i.When forming harmonic oscillations in the inventive device, discrete readings are sequentially obtained

for k = 0, 1, 2, 3, ..., M-1. The sequence of numbers k in the SOK code will be cyclically repeated for each base m _i .

For example, for m ₁ = 2 and m ₂ = 3 (M = m ₁ m ₂ = 6) we obtain the RNS codes:

k = 0 ₁₀ = (0,0); k = 1 ₁₀ = (1,1); k = 2 ₁₀ = (0.2); k = 3 ₁₀ = (1.0); k = 4 ₁₀ = (0,1); k = 5 ₁₀ = (1,2); k = 6 ₁₀ = (0,0).

It can be seen that for this set of bases m _1, the repetition period is m ₁ m ₂ = 6, and with an increase in k by 1, the residues for each base of the RNC increase to the value m _i -1, and then return to zero, that is, form an increase by 1 the sequence can be obtained using the circular shift register.

When the circuit is included in the first cattle trigger for each base m _i , a logical “1” should be written, and “0” in the rest. With the arrival of clock pulses from the clock, the logical “1” will advance along the ring of triggers, thereby simulating an increase in the number of k in the RNC by a code unit. It follows that the time t _k in (8) will be equal to the maximum possible switching frequency of cattle triggers (more than 400 MHz [3, p. 39, table 2.1]), that is, t _K ≈ 2-2.5 ns.

As already noted, the multiplication of the numbers A and k in the RNS is performed separately for each base, that is, in parallel.

двухвходовых элементов “И” [6, с.16-17], а сигнал при получении результата умножения будет распространяться через два логических элемента. Отсюда следует, что t_УМН в (8) будет равно удвоенному времени задержки t_ЛЭ логическом элементе: t_УМН=2· t_ЛЭ=1 нс (t_ЛЭ≈ 0,5 нс [3, с.39, табл. 2.1]).If the remainder of the number А-а _i and the remainder of the number k-χ _i on the base m _{i are} represented by unitary codes, then the multiplier of these numbers on this base can be made in the form of a matrix of

two-input elements “AND” [6, p.16-17], and the signal upon receipt of the result of the multiplication will propagate through two logical elements. It follows that t _UMN in (8) will be equal to twice the delay time t _{LE of the} logic element: t _UMN = 2 · t _LE = 1 ns (t _LE ≈ 0.5 ns [3, p. 39, Table 2.1]) .

Thus, in the proposed device, the time to obtain a discrete sample of harmonic oscillations at its output will be equal to

For example, at N = 6 and T = 10 ⁻¹¹ s = 0.01 ns, tΣ ≈ 3.08 ns. Therefore, samples can be formed with a clock frequency F _T ≤ 1 / tΣ ≈ 325 MHz.

To restore harmonic oscillation from discrete samples, it is necessary to have at least two samples on its period. Thus, the maximum value of the synthesized frequency in the proposed device can reach 162 MHz.

In the prototype, the time to obtain a discrete sample of harmonic oscillation will be the sum of the time the two numbers are added in the position code in the accumulating adder (t _NS ), the time the number was taken from the read-only memory (t _ROM ), and the time the number was converted to voltage in the DAC (t _DAC ). According to [3, p.45; p.56; p. 51]: t _DAC ≈ 10-20 ns; t _ROM ≈ 20 ns; t _NS ≈ 10 ns.

Hence the total sample formation time in the prototype: t _PR ≈ 10 + 20 + 10≈ 40 ns, and the maximum synthesized frequency f _max ≈ F _T / 2 = (1/40) / 2 = 12.5 MHz, which is almost 13 times less than the proposed device.

The drawing shows a structural diagram of a frequency synthesizer, where 1 is a clock generator, 2.1-2.N are ring shift registers, 3.1-3.N are tabular multipliers modulo, 4 is a harmonic signal generator, 5.1-5.N are controlled phase shifters, 6 — phase detector, 7 — sampling and storage device, 8 — low-pass filter, 9 — device output.

и

подключены соответственно к входам l (входам первого операнда) табличных умножителей по модулю

и

, входы 2 (входы второго операнда) которых соединены с унитарными кодами остатков значения частоты синтезатора, выход генератора гармоничного сигнала 4 соединен с входами 2 управляемых фазовращателей 5.1 и

, выходы управляемых фазовращателей

и

- соответственно с входом 2 управляемых фазовращателей 5.(i+1) и 5.[j+1), выход управляемого фазовращателя

подключен к входу 1 фазового детектора 6, а выход управляемого фазовращателя 5.N - к входу 2, причем к входам l управляемых фазовращателей 5.1.-5.N подключены выходы соответствующих табличных умножителей 3.1.-3.N, при этом выход фазового детектора 6 соединен со входом 1 устройства выборки и хранения 7, выход которого подключен к входу ФНЧ 8, а выход ФНЧ является выходом 9 устройства.The output of the clock generator l is connected to the clock inputs of the ring shift registers 2.1.-2.N and the input 2 of the sampling and storage device 7, the outputs of the ring shift registers

and

connected respectively to the inputs l (inputs of the first operand) of the table multipliers modulo

and

inputs 2 (inputs of the second operand) which are connected to unitary codes of the remainder of the synthesizer frequency value, the output of the harmonic signal generator 4 is connected to the inputs 2 of the controlled phase shifters 5.1 and

controlled phase shifter outputs

and

- respectively, with the input of 2 controlled phase shifters 5. (i + 1) and 5. [j + 1), the output of the controlled phase shifter

connected to the input 1 of the phase detector 6, and the output of the controlled phase shifter 5.N to the input 2, and to the inputs l of the controlled phase shifters 5.1.-5.N the outputs of the corresponding table multipliers 3.1.-3.N are connected, while the output of the phase detector 6 connected to the input 1 of the sampling and storage device 7, the output of which is connected to the input of the low-pass filter 8, and the output of the low-pass filter is the output 9 of the device.

Consider the operation of the device.

записывается логическая “1”, а в остальные триггеры - “0”. Это соответствует числу k=0 в коде СОК.When you turn on the frequency synthesizer in the first cattle trigger

Logical “1” is written, and “0” in other triggers. This corresponds to the number k = 0 in the RNS code.

(входы второго операнда) поступает унитарный код остатка номинала синтезируемой частоты по модулю m_i-а_i=(A)mod m_i

. Данный код остатка формируется с учетом значений разрядов позиционного представления значения номинала синтезируемой частоты [4, с.34]:

, где α _p - значения р-го разряда позиционного кода; q_p - вес р-го разряда n-разрядного позиционного кода, по следующей формулеThe second inputs of the table multipliers modulo

(inputs of the second operand) the unitary code of the remainder of the nominal value of the synthesized frequency is received modulo m _i -a _i = (A) mod m _i

. This code of the remainder is formed taking into account the values of the bits of the positional representation of the nominal value of the synthesized frequency [4, p. 34]:

, where α _p are the values of the _pth digit of the position code; q _p is the weight of the rth digit of the n-bit position code, according to the following formula

осуществляется умножение кодов остатков χ _i, на остатки значения номинала синтезируемой частоты а_i по модулю m_i. В соответствии со значением результатов умножения

в управляемых фазовращателях

и

устанавливаются сдвиги фазы

и

. После прохождения гармонического сигнала с выхода генератора гармонического сигнала 4 через управляемые фазовращатели

и

на выходе фазовращателей

и 5.N будет набег фазы Ф₁ (7) и Ф₂ (8). В результате обработки сигналов с этим набегом фазы в фазовом детекторе 6 на его выходе образуется напряжение, прямо пропорциональное

. Уровень, равный этому напряжению, с приходом следующего тактирующего сигнала с выхода тактового генератора 1 запоминается в устройстве выборки и хранения 7. (Примеры практической реализации устройства выборки и хранения приведены в [3, с.39-41]).In table multipliers modulo

the codes of residues χ _i are multiplied by the residuals of the nominal value of the synthesized frequency a _i modulo m _i . According to the value of the multiplication results

in controlled phase shifters

and

phase shifts are set

and

. After passing the harmonic signal from the output of the harmonic signal generator 4 through controlled phase shifters

and

output phase shifters

and 5.N will be the incursion of the phase Ф ₁ (7) and Ф ₂ (8). As a result of the processing of signals with this phase shift in the phase detector 6, a voltage is generated at its output that is directly proportional

. The level equal to this voltage, with the arrival of the next clock signal from the output of the clock generator 1, is stored in the sampling and storage device 7. (Examples of practical implementation of the sampling and storage device are given in [3, pp. 39-41]).

, тем самым число k в коде СОК увеличивается на 1, и процесс формирования дискретных отсчетов синтезируемого гармонического колебания повторяется аналогично изложенному выше.With the same clocking signal, logical “1” advances to the following cattle triggers

, thereby increasing the number k in the RNS code by 1, and the process of generating discrete samples of synthesized harmonic oscillations is repeated similarly to the above.

The sequence of discrete samples from the output of the sampling and storage device 7 is fed to the input of the low-pass filter 8, in which the first harmonic is allocated, the frequency of which is equal to f _o (1). And finally, the harmonic oscillation formed from successive discrete samples goes to output 9 of the synthesizer.

Example: Let m ₁ = 2; m ₂ = 3; m ₃ = 5 and m ₄ = 7; A = 3; F _T = 210 MHz.

We get

M = m ₁ · m ₂ · m ₃ · m ₄ = 210; f _o = F _T · A / M = 3 MHz;

a ₁ = (A) mod m ₁ = 1; a ₂ = 0; a ₃ = 3; a ₄ = 3;

μ ₁ = 1; μ ₂ = 1; μ ₃ = 3; μ 4 = 4.

When you turn on the frequency synthesizer in the cattle 2.1-2.4, the reference number k = 0 ₁₀ is written in the unit code of the RNS k = (0, 0, 0, 0). The residues of the number k on the bases m ₁ , m ₂ , m ₃ and m ₄ are multiplied by the corresponding residues a ₁ , a ₂ , a ₃ and a ₄ in the factors 3.1-3.4. We get the number in the SOK code C [0] = (0, 0, 0, 0). In controlled phase shifters 5.1-5.4, phase shifts are set φ ₁ = 0; φ ₂ = 0; φ ₃ = 0 and φ ₄ = 0. Accordingly, at the output of PD 6 there will be a voltage directly proportional to X (Δ t · 0) = cos (0) = 1, which, with the arrival of the next clock signal, is recorded in the sampling and storage device 7. The data in RNS 2.1-2.4 are advanced by the same clock signal one cycle, which corresponds to the reference number k = 1 ₁₀ = (1, 1, 1, 1).

This number is multiplied for appropriate reasons in the multipliers 3.1-3.4 with the remainders of the number A = (1, 0, 3, 3). We get: C [1] = (1, 0, 3, 3). UV 5.7-5.4 sets phase shifts

φ ₂=0;

φ ₂ = 0;

. Соответственно с приходом следующего тактирующего сигнала с выхода тактового генератора 1 в устройство выборки и хранения запишется напряжение, прямо пропорциональноеThe phase difference of the harmonic signals at the input of the PD 6 will be equal to

. Accordingly, with the arrival of the next clock signal from the output of the clock generator 1, a voltage directly proportional to

. Процесс формирования отсчетов будет продолжаться до k=209, а затем повторяться вновь с k=0. Из этой последовательности дискретных отсчетов в ФНЧ 8 формируется гармоническое колебание с частотой f_вых=3 МГц.

. The process of forming samples will continue until k = 209, and then repeat again with k = 0. From this sequence of discrete samples in the low-pass filter 8, a harmonic oscillation with a frequency f _o = 3 MHz is formed.

Sources of information

1. Bogatyrev Yu.K., Stankov B.C. Variational methods for constructing highly efficient systems for the computational synthesis of frequencies // Radio Electronics (Izv. Vyssh. Ucheb. Institutions), - 2002, - vol. 45, No. 4, p. 18-24.

2. Starikov O. Direct digital synthesis of frequency and its application // CHIP news. Engineering microelectronics. - 2002, - No. 3, p. 56-64.

3. Digital radio receiving systems: Handbook / M.I.Zhodzishsky, RBB Mazepa, EPOvsyannikov et al. / Ed. M.I.Zhodzishsky. M .: Radio and communications, 1990, - 208 p.

4. Akushsky I.Ya., Yuditsky D.I. Machine arithmetic in residual classes. - M .: Owls. radio, 1968, - 440 s.

5. Ovcharenko L.A. Implementation of a digital transverse filter in a system of residual classes // Radioelectronics (Izv. Vyssh. Ucheb. Institutions). - 2002, - t. 45, No. 4, p. 50-57.

6. Dolgov A.I. Diagnostics of devices operating in the system of residual classes. - M .: Radio and communications, 1982, - 64 p.

Claims (1)

A digital harmonic synthesizer containing a clock and a low-pass filter, the output of which is the output of the device, characterized in that N ring shift registers, N modular table multipliers, N controlled phase shifters, a harmonic signal generator, a phase detector and a sampling device are introduced into it and storage, and the ith ring shift register, where i = 1, 2, ..., N, contains m _i bits, where m ₁ , m ₂ , ..., m _N are coprime positive integers, for this output j-th bit, where j = 0, l, ..., m _i - 1, i-th ring th shift register is connected to the j-th discharge unitary code first operand i-th table multiplier modulo, to the corresponding bits of the second operand is connected one-hot residue modulo m _i values of frequency synthesizer, the output of i-th table multiplier modulo connected to the first input of the i-th controlled phase shifter, while the output of the harmonic signal generator is connected to the second inputs of the first, as well as

-th - at N - even, or

-th - at N - odd, controlled phase shifters, outputs of the rth and qth controlled phase shifters, where

connected respectively to the second inputs of the (p + 1) th and (q + l) th guided phase shifters, and the outputs

-th - at N - even, or

-th - when N is odd, and the Nth controlled phase shifters are connected respectively to the first and second input of the phase detector, the output of which is connected to the first input of the sampling and storage device, and the output of the clock generator is connected to the clock inputs of the ring shift registers and the second input of the device sampling and storage, the output of which is connected to the input of the low-pass filter.