RU2160922C1 - N-fold differentiating device - Google Patents

Abstract

FIELD: computer engineering; specific derivative calculations. SUBSTANCE: device is designed to compute simultaneously i-power derivatives (

Description

 The invention relates to computer technology and can be used in special computers to calculate derivatives.

 Known digital differentiator [1]. The disadvantage of this device is the limited functionality due to the inability to calculate derivatives of higher orders.

 A device for differentiation and multiplication [2] is known, which allows one to calculate first and second order derivatives using the values of the left, right, and central differences. The disadvantage of this device is the limited functionality due to the inability to calculate derivatives above the second order.

 The closest in technical essence to the claimed invention is a differentiating device [3], containing a clock generator, (N + 1) registers, N multiplying devices, a delay element, and the output of the clock generator through a delay element is connected to the synchronization inputs of the first .. ., Nth multiplication device.

от функций, заданных своими отсчетами.The disadvantage of the prototype is limited functionality due to the inability to simultaneously calculate derivatives of the i-th order

from functions defined by their samples.

от функций, заданных своими отсчетами.The invention is aimed at solving the problem of expanding the functionality of the device due to the simultaneous calculation of derivatives of the i-th order

from functions defined by their samples.

от функций, заданных своими отсчетами, введены (N+2)-й регистр, N делителей, аналогово-цифровой преобразователь (АЦП), устройство возведения в N-ю степень, 3 элемента задержки, при этом устройства умножения выполнены с возможностью умножения матриц, выход ГТИ соединен с входами синхронизации АЦП и устройства возведения в N-ю степень, с входом второго элемента задержки, через четвертый элемент задержки с входом синхронизации (N+1)-го регистра, выход второго элемента задержки соединен с входом синхронизации i-го делителя (здесь и далее по описанию при перечислении элементов

и через третий элемент задержки с входом синхронизации i-го регистра; аналоговый вход АЦП является входом значения функции устройства, выход АЦП соединен с информационным входом (N+1)-го регистра, выход которого соединен с первым информационным входом i-го устройства умножения матриц, выход (N+2)-го регистра соединен с информационным входом устройства возведения в N-ю степень, i-й выход которого соединен с первым информационным входом i-го делителя, информационный выход i-го регистра соединен с информационным входом i-го регистра и вторым информационным входом i-го делителя, выход i-го делителя соединен со вторым информационным входом i-го устройства умножения матриц, выход которого является i-м выходом устройства, информационный вход ГТИ и информационный вход (N+2)-го регистра являются входом ввода значения интервала отсчетов функции устройства, вход "сброса" устройства соединен с входами сброса: (N+1)-го регистра, i-го устройства умножения матриц, i-го делителя, устройства возведения в N-ю степень, с входом синхронизации (N+2)-го регистра, с входом управления ГТИ, вход установки режима работы i-го устройства умножения матриц является входом установки режима работы устройства.To do this, in a differentiating device [3], containing a clock generator (GTI), (N + 1) registers, N multiplication devices, a delay element, and the output of the GTI through the delay element is connected to the synchronization inputs of the first,. . . , Nth multiplication devices, in order to expand functionality by simultaneously calculating derivatives of the i-th order

from the functions specified by their readings, the (N + 2) -th register, N dividers, an analog-to-digital converter (ADC), a device for raising to the N-th power, 3 delay elements are introduced, while the multiplication devices are capable of matrix multiplication, the output of the GTI is connected to the synchronization inputs of the ADC and the device of raising to the N-th degree, with the input of the second delay element, through the fourth delay element with the synchronization input of the (N + 1) -th register, the output of the second delay element is connected to the synchronization input of the i-th divider (hereinafter in the description of and transfer elements

and through the third delay element with the synchronization input of the i-th register; the analog input of the ADC is the input of the value of the device function, the ADC output is connected to the information input of the (N + 1) -th register, the output of which is connected to the first information input of the i-th matrix multiplier, the output of the (N + 2) -th register is connected to the information the input of the device of raising to the Nth degree, the i-th output of which is connected to the first information input of the i-th divider, the information output of the i-th register is connected to the information input of the i-th register and the second information input of the i-th divider, output i- th divider is connected to the second and the formation input of the i-th device of matrix multiplication, the output of which is the i-th output of the device, the information input of the GTI and the information input of the (N + 2) -th register are the input of the input of the value of the interval of samples of the function of the device, the input of the "reset" of the device is connected to the reset inputs : (N + 1) -th register, i-th matrix multiplier, i-th divider, raising device to the N-th degree, with a synchronization input (N + 2) -th register, with the input of the GTI control, mode setting input the operation of the i-th matrix multiplier is the input of the mode setting device operation.

The drawing shows a structural diagram of a device N-fold differentiation and the following notation: 1 - GTI, 2 - ADC, 3 - a device for raising to the N-th degree, 4 ₁ ..., 4 ₄ - the first, ..., fourth elements delays, 5 ₁ , ..., 5 _{N + 2} - first, ..., (N + 2) -th registers, 6 ₁ ..., 6 _N - first, ..., N-th divisors, 7 ₁ , ..., 7 _N is the first, ..., Nth matrix multiplier, 8 is the input of the analog value of the function, 9 ₁ , ..., 9 _N is the first, ..., Nth device outputs , 10 - input to enter the value of the interval of samples, 11 - input "reset", 12 - input setting the operating mode of the device.

In the proposed device, the output of the GTI 1 is connected to the synchronization inputs of the ADC 2, the device 3 raising to the N-th degree, through the delay element 4 ₁ with the synchronization input of the i-th device 7 _i matrix multiplication, through the delay element 4 ₄ with the synchronization input (N + 1) -th register 5 _{N + 1} to the input element _{2 April} delay element delays the output April ₂ is connected to the synchronization input of i-th _i splitter 6 and through the delay element 4 with the synchronization _of inputs i-5 _i th register; analog input of ADC 2 is input 8 of the device function value, ADC 2 output is connected to the information input of the (N + 1) -th register 5 _{N + 1} , the output of which is connected to the first information input of the i-th matrix multiplication device 7 _i , output (N Of the +2) -th register 5 _{N + 2 is} connected to the information input of the device 3 raising to the N-th degree, the i-th output of which is connected to the first information input of the i-th divider 6 _i , the output of the i-th register 5 _{i is} connected to the information the input of the i-th register 5 _i and with the second information input of the i-th divider 6 _i , the output of which is connected to the next information input of the i-th device 7 _i matrix multiplication, the output of which is the i-th output of the 9 _i device, the information input of the GTI 1 and the information input of the (N + 2) -th register 5 _{N + 2} are the input 10 of the input of the value of the interval of reading the function devices, the input 11 of the “reset” device is connected to the reset input of the (N + 1) -th register 5 _{N + 1} , with the reset input of the i-th matrix multiplication device 7 _i , with the reset input of the i-th divider 6 _i , erection device 3 in the N-th power, the synchronization input (N + 2) -th register 5 _{N + 2,} the control input of the GTI 1, entry 12 in the operation mode setting troystva connected to the input for setting the operating mode of i-th device 7 _i of matrix multiplication.

 In the theory of numerical differentiation of functions defined by their readings, methods are widely used based on the replacement of a differentiable function by interpolation polynomials. However, based on these methods, it is impossible to build universal devices, since there are no finite analytical relationships for calculating the derivatives of the Nth order of functions defined by their samples. So, in [3], when changing the order of the calculated derivative, it is necessary to recalculate the coefficients of the approximate differentiation formula. In addition, the absence of a criterion for choosing the number of interpolation nodes leads either to a decrease in the accuracy of calculations or to redundancy of calculations.

 The inventive device allows you to replace the procedure of numerical differentiation using interpolation polynomials, proposed in [3], simple matrix transformations in an orthogonal basis.

где M - число отсчетов функции f(x) внутри интервала (O, X), X = π/ω_C- шаг между отсчетами f_i = f(iΔX) функции f(x), sinc[*] = sin[*]/[*].
Для наглядности рассмотрим сначала частный случай, когда N = 1, а затем обобщим полученные результаты на случай произвольного N.Let a function f (x) ∈C _ω , where C _ω is the class of functions bounded in spectrum. Then, for her, the widespread, non-redundant, finite-dimensional representation according to Kotelnikov is fairly widely used in solving various problems [4]

where M is the number of samples of the function f (x) inside the interval (O, X), X = π / ω _C is the step between the samples f _i = f (iΔX) of the function f (x), sinc [*] = sin [*] / [*].
For clarity, we first consider the special case when N = 1, and then generalize the results to the case of arbitrary N.

где f⁽¹⁾ (x) = df(x)/dx.For N = 1, taking into account (1), we have

where f ⁽¹⁾ (x) = df (x) / dx.

где

Анализ выражения (3) показывает, что при k = i возникает неопределенность типа 0/0, для раскрытия которой воспользуемся правилом Лопиталя

Таким образом, формула (3) с учетом (4) принимает вид

При выводе (5) учтено, что в формуле (3) sin[π(k-i)]/[πΔX(k-i)²] = 0 ∀ k≠i. Запишем выражение (5) в векторно-матричной форме
f⁽¹⁾ = f M₁, (6)

Матрица дифференцирования имеет следующий вид

Таким образом, операция дифференцирования f(x) по аргументу x может быть выполнена путем простого умножения вектора отсчетов данной функции f на матрицу дифференцирования M₁.Substituting in (2) X = kΔX, we find the value f ⁽¹⁾ (x) at the reference points

Where

An analysis of expression (3) shows that for k = i, an uncertainty of type 0/0 arises, for the disclosure of which we use the L'Hospital rule

Thus, formula (3), taking into account (4), takes the form

In the derivation of (5), it was taken into account that in the formula (3) sin [π (ki)] / [πΔX (ki) ² ] = 0 ∀ k ≠ i. We write expression (5) in the vector-matrix form
f ⁽¹⁾ = f M ₁ , (6)

The differentiation matrix has the following form

Thus, the differentiation operation f (x) with respect to argument x can be performed by simply multiplying the sample vector of a given function f by the differentiation matrix M ₁ .

- для четных N, N ∈ 2, 4, 6...,

- для нечетных N, N ∈ 1,3,5...,([^*] - целая часть числа).Summarizing the above results to the case of arbitrary N, we obtain the following expressions for the Nth order derivative at reference points [5]

- for even N, N ∈ 2, 4, 6 ...,

- for odd N, N ∈ 1,3,5 ..., ([ ^* ] is the integer part of the number).

 Expressions (8), (9) are the basis for the functioning of the device.

переписывается в (N+1)-й регистр 5_N+1, элемент 4₄ задержки требуется для задержки поступления ТИ на (N+1)-й регистр 5_N+1 на время преобразования в АЦП 2 аналогового значения сигнала функции f(x) в цифровой код. По ТИ в устройстве 3 возведения в N-ю степень Δx возводится в i-ю степень

значения (Δx)ⁱ выставляются за К ТИ (K = f(N)) на i-й выход устройства 3 возведения в N-ю степень, элемент 4₂ задержки задерживает поступление ТИ на i-й делитель 6_i на К ТИ (т.е. пока на первый информационный вход i-го делителя 6_i не поступит значение (Δx)ⁱ). С каждым (K+j)-м ТИ на второй информационный вход i-го делителя 6₁ выдаются элементы j-го столбца матрицы B_i и переписываются на вход i-го регистра 5_i, i-й делитель 6_i производит деление поступающих на его второй информационный вход с i-го регистра 5_i элементов j-го столбца матрицы B_i на значение (Δx)ⁱ, формируя на своем выходе элементы j-го столбца матрицы дифференцирования M_i. Элемент 4_з задержки необходим для задержки поступления ТИ на i-й регистр 5_i на время перезаписи значений столбца матрицы B_i в i-й делитель 6_i, (N+1)-й регистр 5_N+1 собран последовательно таким образом, что последующий отсчет значения функции записывается на место предыдущего, а предыдущий сдвигается к выходу, длина (N+1)-го регистра 5_N+1 равна (K+1) значений отсчетов, элемент 4₁ задержки задерживает поступление ТИ на вход синхронизации i-го устройства 7_i умножения матриц на (K+1) тактов. С каждым (K+1+j)-м ТИ на первый информационный вход i-го устройства 7_i умножения матриц с выхода (N+1)-го регистра 5_N+1 поступает j-й отсчет значения функции f_j(x), с выхода i-го делителя 6_i на второй информационный вход i-го устройства 7_i умножения матриц поступает сформированный в процессе работы устройства j-й столбец матрицы дифференцирования M_i, за М ТИ i-е устройство 7_i умножения матриц перемножает вектор отсчетов функции f(x) на матрицу дифференцирования M_i, через (K+2)+M ТИ после начала работы на выходе i-го устройства 7_i умножения матриц имеют место вектор отсчетов производной i-го порядка f(x)⁽ⁱ⁾.The device operates as follows. The code Δx is supplied to input 10 of the value of the readout interval of the device, and potential 12 is supplied to input 12 of the operation mode setting, which has the level of a logical unit, which is the whole process of calculations. In the i-th register 5 _{i is} written the matrix of weights B _i . A pulse is applied to the input 11 of the “reset”, according to which the (N + 1) -th register 5 _{N + 1} , the i-th device 7 _i matrix multiplication, the i-th divider 6 _i , the device 3 raising to the N-th degree are reset, delay elements 4 ₁ , 4 ₂ , 4 ₃ , 4 ₄ are prepared for work, and the code of the value of the interval of counting Δx is entered in the (N + 2) -th register 5 _{N + 2} and GTI 1. In accordance with the Δx value supplied to the GTI 1, it starts to issue clock pulses (TI) with a period of Δx. According to these TIs, the ADC 2 converts the value of the analog signal of the function f (x) into a digital code and outputs it to the input of the (N + 1) -th register 5 _{N + 1} , into which through the element 4 ₄ delays TI receives, according to which the value of the function reference f _j (x)

it is written to the (N + 1) -th register 5 _{N + 1} , delay element 4 ₄ is required to delay the arrival of a TUE to the (N + 1) -th register 5 _{N + 1} during the conversion to the ADC of 2 analog values of the signal of the function f (x ) into a digital code. According to the TI in the device 3 of raising to the N-th degree, Δx is raised to the i-th degree

the values (Δx) ^{i are} set for K TI (K = f (N)) to the i-th output of the device 3 raising to the N-th degree, the delay element 4 ₂ delays the receipt of TI on the i-th divider 6 _i on K TI (t .e. until the value (Δx) ⁱ ) arrives at the first information input of the i-th divider 6 _i . With each (K + j) th TI, the elements of the jth column of the matrix B _{i are} output to the second information input of the i-th divider 6 ₁ and are transferred to the input of the i-th register 5 _i , the i-th divider 6 _i divides incoming its second information input from the i-th register of 5 _i elements of the j-th column of the matrix B _i to the value (Δx) ⁱ , forming at its output the elements of the j-th column of the differentiation matrix M _i . Element 4 _of the delay necessary to delay the TI proceeds to i-th register 5 at time _i overwriting column of matrix B _i in the i-th subgroup 6 _i, (N + 1) -th register 5 _{N + 1} assembled in series so that the subsequent sample of the function value is written to the place of the previous one, and the previous one is shifted to the output, the length of the (N + 1) -th register 5 _{N + 1} is equal to (K + 1) the values of the samples, the delay element 4 ₁ delays the receipt of the TI at the synchronization input of the i-th devices 7 _i matrix multiplication by (K + 1) ticks. With each (K + 1 + j) th TI, the j-th sample of the value of the function f _j (x) is received at the first information input of the ith device 7 _{i of} matrix multiplication from the output of the (N + 1) -th register 5 _{N + 1} , from the output of the i-th divider 6 _i to the second information input of the i-th matrix multiplying device 7 _{i, the} j-th column of the differentiation matrix M _i formed during the device’s operation is received, for M TI the i-th matrix multiplying device 7 _i multiplies the sample vector of the function f (x) to the differentiation matrix M _i , through (K + 2) + M TI after starting work at the output of the i-th device 7 _i matrix multiplication takes place ctor of samples of the ith order derivative f (x) ⁽ⁱ⁾ .

 The inventive device allows to solve the problem of numerical differentiation of functions in real time, which is very important when solving a wide range of problems [6, 7].

List of references
1. A.c. USSR N 1485238, G 06 F 7/64, 1987 / Bulletin "Discoveries, inventions", 1989, N 12.

 2. A.c. USSR N 1293728, G 06 F 7/64, 1985 / Bulletin "Discoveries, inventions", 1987, N 8.

 3. A.c. USSR N 1280623, G 06 F 7/64, 1985 / Bulletin "Discoveries, inventions", 1986, N 48.

 4. Gonorovsky I.S. Radio engineering circuits and signals. - M.: Radio and communications, 1986.

 5. Yu.G. Bulychev, I.V. Burlai S.A. Pogonyshev. The numerical-analytical method of differentiating functions with a limited spectrum using the Kotelnikov formula // Journal of Computational Mathematics and Mathematical Physics. T. 32, N 3, 1992

 6. Yu. G. Bulychev, S.A. Pogonyshev. Nonparametric estimation of posterior distributions in the nonlinear filtering problem // Automation and Remote Control, N 11, 1990

 7. Yu.G. Bulychev, S.A. Pogonyshev. Digital modeling methods for stochastic evolutionary differential equations // Journal of Computational Mathematics and Mathematical Physics. T. 30, N 8, 1990

Claims (1)

An N-fold differentiation device comprising a clock generator (GTI), (N + 1) registers, N multiplication devices, a delay element, the GTI output through a delay element connected to the synchronization input of the i-th multiplication device

characterized in that the (N + 2) th register, N dividers, an analog-to-digital converter (ADC), a device for raising to the N-th power, 3 delay elements are introduced into it, while the multiplication devices are capable of matrix multiplication, the output GTI is connected to the synchronization inputs of the ADC, the device of raising to the N-th degree with the input of the second delay element, through the fourth delay element with the synchronization input of the (N + 1) -th register, the output of the second delay element is connected to the synchronization input of the i-th divider

and through the third delay element with the synchronization input of the i-th register

the analog input of the ADC is the input of the value of the device function, the ADC output is connected to the information input of the (N + 1) -th register, the output of which is connected to the first information input of the i-th multiplication device

the output of the (N + 2) -th register is connected to the information input of the device of raising to the N-th degree, i-th output

which is connected to the first information input of the i-th divider

i-register output

connected to its information input and to the second information input of the i-th divider

the output of which is connected to the second information input of the i-th multiplication device

the output of which is the i-th output of the device

the information input of the GTI and the information input of the (N + 2) -th register are the input of the value of the interval of counting functions of the device, the reset input of the device is connected to the reset inputs of the (N + 1) -th register, i-th multiplication device

i-th divider

devices of raising to the N-th degree, with the synchronization input of the (N + 2) -th register, with the control input of the GTI, the input of setting the operating mode of the i-th multiplication device

is the input of setting the operating mode of the device.