RU2012126890A - Система обработки с управлением обращения к внешней памяти - Google Patents

Система обработки с управлением обращения к внешней памяти Download PDF

Info

Publication number
RU2012126890A
RU2012126890A RU2012126890/08A RU2012126890A RU2012126890A RU 2012126890 A RU2012126890 A RU 2012126890A RU 2012126890/08 A RU2012126890/08 A RU 2012126890/08A RU 2012126890 A RU2012126890 A RU 2012126890A RU 2012126890 A RU2012126890 A RU 2012126890A
Authority
RU
Russia
Prior art keywords
external memory
power supply
available power
threshold value
processing system
Prior art date
Application number
RU2012126890/08A
Other languages
English (en)
Other versions
RU2606551C2 (ru
Inventor
Пол Дж. ХЕЙЗ
Крейг Б. МАКАНАЛЛИ
Уилльям М. МАНСФИЛД
Original Assignee
Майкро Моушн, Инк.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Майкро Моушн, Инк. filed Critical Майкро Моушн, Инк.
Publication of RU2012126890A publication Critical patent/RU2012126890A/ru
Application granted granted Critical
Publication of RU2606551C2 publication Critical patent/RU2606551C2/ru

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3243—Power saving in microcontroller unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/329—Power saving characterised by the action undertaken by task scheduling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G06F3/0635—Configuration or reconfiguration of storage systems by changing the path, e.g. traffic rerouting, path reconfiguration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2206/00—Indexing scheme related to dedicated interfaces for computers
    • G06F2206/10—Indexing scheme related to storage interfaces for computers, indexing schema related to group G06F3/06
    • G06F2206/1012—Load balancing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Software Systems (AREA)
  • Power Sources (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Microcomputers (AREA)

Abstract

1. Способ исполнения программы обработки, использующей внутреннюю память и внешнюю память, содержащий этапы, на которых:определяют доступное энергоснабжение;обращаются к внешней памяти, если доступное энергоснабжение превышает пороговое значение, иобращаются к внутренней памяти, если доступное энергоснабжение не превышает пороговое значение.2. Способ по п.1, дополнительно содержащий этап, на котором распределяют обращения к внешней памяти, если доступное энергоснабжение не превышает пороговое значение.3. Способ по п.2, дополнительно содержащий этап, на котором распределяют обращения к внешней памяти на основании заранее определенного количества последовательных обращений к внешней памяти.

Claims (3)

1. Способ исполнения программы обработки, использующей внутреннюю память и внешнюю память, содержащий этапы, на которых:
определяют доступное энергоснабжение;
обращаются к внешней памяти, если доступное энергоснабжение превышает пороговое значение, и
обращаются к внутренней памяти, если доступное энергоснабжение не превышает пороговое значение.
2. Способ по п.1, дополнительно содержащий этап, на котором распределяют обращения к внешней памяти, если доступное энергоснабжение не превышает пороговое значение.
3. Способ по п.2, дополнительно содержащий этап, на котором распределяют обращения к внешней памяти на основании заранее определенного количества последовательных обращений к внешней памяти.
RU2012126890A 2008-07-23 2012-06-27 Система обработки с управлением обращением к внешней памяти RU2606551C2 (ru)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
PCT/US2008/070906 WO2010011220A1 (en) 2008-07-23 2008-07-23 Processing system with external memory access control
USPCT/US2008/070906 2008-07-23

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
RU2011106757/08A Division RU2011106757A (ru) 2008-07-23 2008-07-23 Система обработки с управлением обращением к внешней памяти

Publications (2)

Publication Number Publication Date
RU2012126890A true RU2012126890A (ru) 2014-01-10
RU2606551C2 RU2606551C2 (ru) 2017-01-10

Family

ID=40560202

Family Applications (2)

Application Number Title Priority Date Filing Date
RU2012126890A RU2606551C2 (ru) 2008-07-23 2012-06-27 Система обработки с управлением обращением к внешней памяти
RU2014125812/08A RU2568306C1 (ru) 2008-07-23 2014-06-25 Система обработки с управлением обращением к внешней памяти

Family Applications After (1)

Application Number Title Priority Date Filing Date
RU2014125812/08A RU2568306C1 (ru) 2008-07-23 2014-06-25 Система обработки с управлением обращением к внешней памяти

Country Status (15)

Country Link
US (1) US8688943B2 (ru)
EP (2) EP2318935B1 (ru)
JP (1) JP5690728B2 (ru)
KR (1) KR101244795B1 (ru)
CN (1) CN102105870B (ru)
AR (1) AR072829A1 (ru)
AU (1) AU2008359713B2 (ru)
BR (1) BRPI0822963B1 (ru)
CA (2) CA2896581C (ru)
DK (1) DK2318935T3 (ru)
HK (2) HK1159283A1 (ru)
MX (1) MX2011000292A (ru)
PL (1) PL2318935T3 (ru)
RU (2) RU2606551C2 (ru)
WO (1) WO2010011220A1 (ru)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140073384A (ko) * 2012-12-06 2014-06-16 삼성전자주식회사 보안 부팅을 수행하는 칩 시스템과 이를 이용하는 화상형성장치 및 그 보안 부팅 방법
US9881161B2 (en) 2012-12-06 2018-01-30 S-Printing Solution Co., Ltd. System on chip to perform a secure boot, an image forming apparatus using the same, and method thereof
US20140164753A1 (en) * 2012-12-06 2014-06-12 Samsung Electronics Co., Ltd System on chip for performing secure boot, image forming apparatus using the same, and method thereof
US9443600B2 (en) * 2013-03-28 2016-09-13 Intel Corporation Auto-suspend and auto-resume operations for a multi-die NAND memory device to reduce peak power consumption
US10101910B1 (en) * 2015-09-15 2018-10-16 Amazon Technologies, Inc. Adaptive maximum limit for out-of-memory-protected web browser processes on systems using a low memory manager
US10289446B1 (en) 2015-09-15 2019-05-14 Amazon Technologies, Inc. Preserving web browser child processes by substituting a parent process with a stub process
US10248321B1 (en) 2015-09-15 2019-04-02 Amazon Technologies, Inc. Simulating multiple lower importance levels by actively feeding processes to a low-memory manager

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0111013B1 (en) * 1982-12-03 1986-07-23 The Dow Chemical Company Glycol compositions containing phosphorous-modified silane
DE3325924A1 (de) * 1983-07-19 1985-01-31 Rheinmetall GmbH, 4000 Düsseldorf Blendenlafettierung wenigstens einer automatischen rohrwaffe in beengter einbaulage
DE3752017T2 (de) * 1986-03-20 1997-08-28 Nec Corp Mikrorechner mit Zugriffsfähigkeit auf einen internen Speicher mit gewünschter variabler Zugriffszeit
JPH0546473A (ja) * 1991-08-13 1993-02-26 Oki Electric Ind Co Ltd マイクロプロセツサにおけるメモリ空間拡張回路
JPH05342380A (ja) * 1992-06-10 1993-12-24 Mitsubishi Electric Corp マイクロコンピュータの動作モード制御回路
US6202129B1 (en) * 1998-03-31 2001-03-13 Intel Corporation Shared cache structure for temporal and non-temporal information using indicative bits
EP1110136B1 (en) 1998-09-01 2002-03-06 Intel Corporation Control of memory access operations
US6681285B1 (en) * 1999-07-22 2004-01-20 Index Systems, Inc. Memory controller and interface
US6330647B1 (en) * 1999-08-31 2001-12-11 Micron Technology, Inc. Memory bandwidth allocation based on access count priority scheme
US6662278B1 (en) * 2000-09-22 2003-12-09 Intel Corporation Adaptive throttling of memory acceses, such as throttling RDRAM accesses in a real-time system
DE10063936A1 (de) 2000-12-20 2002-06-27 Thomson Brandt Gmbh Interrupt Controller für einen Mikroprozessor
US6784881B2 (en) * 2002-01-04 2004-08-31 Sun Microsystems, Inc. Synchronizing multiple display channels
US7210004B2 (en) * 2003-06-26 2007-04-24 Copan Systems Method and system for background processing of data in a storage system
US7035155B2 (en) * 2002-09-26 2006-04-25 Xware Technology, Inc. Dynamic memory management
JP3986950B2 (ja) * 2002-11-22 2007-10-03 シャープ株式会社 Ｃｐｕおよびこれを備えた情報処理装置、ｃｐｕの制御方法
GB0320142D0 (en) * 2003-08-28 2003-10-01 Ibm Data storage systems
US7064994B1 (en) * 2004-01-30 2006-06-20 Sun Microsystems, Inc. Dynamic memory throttling for power and thermal limitations
JP4773693B2 (ja) * 2004-06-07 2011-09-14 キヤノン株式会社 メモリ制御システム
US7318130B2 (en) 2004-06-29 2008-01-08 Intel Corporation System and method for thermal throttling of memory modules
US7277982B2 (en) 2004-07-27 2007-10-02 International Business Machines Corporation DRAM access command queuing structure
US7490197B2 (en) 2004-10-21 2009-02-10 Microsoft Corporation Using external memory devices to improve system performance
JP2006251837A (ja) * 2005-03-08 2006-09-21 Matsushita Electric Ind Co Ltd メモリ制御装置
JP4416694B2 (ja) * 2005-05-12 2010-02-17 株式会社ソニー・コンピュータエンタテインメント データ転送調停装置およびデータ転送調停方法
JP4075914B2 (ja) 2005-06-30 2008-04-16 ブラザー工業株式会社 データ処理装置
US7549034B2 (en) * 2005-11-10 2009-06-16 International Business Machines Corporation Redistribution of memory to reduce computer system power consumption
JP2007213556A (ja) * 2006-01-11 2007-08-23 Matsushita Electric Ind Co Ltd 回路解析装置
JP2008140076A (ja) * 2006-11-30 2008-06-19 Toshiba Corp 情報処理装置
US8396515B2 (en) * 2007-11-30 2013-03-12 Symbol Technologies, Inc. Dynamic battery capacity allocation for data retention among mobile computers and electronic devices
RU72339U8 (ru) * 2007-12-27 2008-06-10 Общество с ограниченной ответственностью "НТЦ "Фактор" Модуль многопроцессорной вычислительной системы (варианты)

Also Published As

Publication number Publication date
EP2682871A1 (en) 2014-01-08
KR20110034676A (ko) 2011-04-05
CN102105870A (zh) 2011-06-22
CA2896581A1 (en) 2010-01-28
CA2896581C (en) 2018-08-14
US20110113173A1 (en) 2011-05-12
PL2318935T3 (pl) 2015-04-30
JP2011529218A (ja) 2011-12-01
US8688943B2 (en) 2014-04-01
WO2010011220A1 (en) 2010-01-28
MX2011000292A (es) 2011-02-23
BRPI0822963B1 (pt) 2019-10-01
CN102105870B (zh) 2015-05-20
HK1159283A1 (en) 2012-07-27
EP2318935A1 (en) 2011-05-11
EP2682871B1 (en) 2017-05-17
DK2318935T3 (en) 2015-01-26
HK1215085A1 (zh) 2016-08-12
CA2731728C (en) 2017-03-28
JP5690728B2 (ja) 2015-03-25
RU2606551C2 (ru) 2017-01-10
AR072829A1 (es) 2010-09-22
BRPI0822963A2 (pt) 2018-06-05
AU2008359713B2 (en) 2012-12-13
RU2568306C1 (ru) 2015-11-20
EP2318935B1 (en) 2014-11-19
AU2008359713A1 (en) 2010-01-28
KR101244795B1 (ko) 2013-03-18
CA2731728A1 (en) 2010-01-28

Similar Documents

Publication Publication Date Title
RU2012126890A (ru) Система обработки с управлением обращения к внешней памяти
TW200625089A (en) Secure boot scheme from external memory using internal memory
PH12019501499A1 (en) Blockchain consensus method and device
RU2018112566A (ru) Уменьшение потребления мощности системы "телефон как ключ" (paak) транспортного средства
TW200943046A (en) System and method for fast platform hibernate and resume
WO2012033839A3 (en) Oxygen concentrator heat management system and method
DE602004024499D1 (de) Speichersteuerung, die Prozessorenergiezustände berücksichtigt
RU2016135225A (ru) Система связи
ATE554443T1 (de) Anweisungsgesteuerte datenverarbeitungseinrichtung und -verfahren
TW200632742A (en) Method and apparatus for varying energy per instruction according to the amount of available parallelism
GB2506833A (en) Method and apparatus for using cache memory in a system that supports a low power state
EP2450822A3 (en) Method, system and smart card reader for management of access to a smart card
WO2010045000A3 (en) Hot memory block table in a solid state storage device
TW200736908A (en) Memory system and memory management method including the same
GB2511669A (en) Solid-state storage management
TW200517955A (en) System and method for handling exceptional instructions in a trace cache based processor
EP2248023A4 (en) EXTENDED USAGE SURFACE FOR MEMORY DEVICE
WO2005116840A3 (en) Information processing apparatus and information processing method
WO2016126523A3 (en) Authenticated control stacks
GB2509478A (en) Intra-block memory wear leveling
BR112016014639A2 (pt) Regra de ativação de drx em um ambiente eicic
WO2014150815A3 (en) System and method to dynamically determine a timing parameter of a memory device
GB0921776D0 (en) Payment device
TW200632669A (en) Data processing system, access control method, and access control device
TWI266327B (en) Flash memory with reduced size and method for accessing the same