RU1839280C - Device for processing of t-codes - Google Patents

Abstract

The invention relates to computing and data transmission and can be used for sequential decoding of T codes. The purpose of the invention is to expand the scope by decoding T codes. The goal is achieved in a device containing triggers 1.1 - 13, elements 2.1, 23 and 25 of the prohibition element I / M 22. - elements I 2.4 and 26, elements 3.1 - 3.3 delay elements with corresponding links. The device allows to decode even and odd T-codes with correction of unit bias errors in them. 2 ill.

Description

aip

2Xi ± (T -1) / 2 + Xi - (T +1) / 2, if aypr 1 2Xf ± (T - 1 yr + X | + (T + 1) / 2, if 2xi ± (T - 1) / 2 0,. (4)

where Jxi ± (T -1) / 2 is the sum of all elements (premises) located no further than (Г-1) / 2nd from xi, and x) ± 0 + 1) / 2 is the premise that is far from equal number of parcels from xi and xn-i (that is, through an equal number of protective zeros from at and en-i), the so-called undefined parcel.

The security T-code corrects all errors of the type of displacement by K bits to the right to the left, as well as 75% of errors of the type of displacement by K + - (- 1 bit at T 2K + 1. The way to correct the shift error by K + 1 bit is storing an undefined premise and analyzing previous and subsequent elements of a code combination.

Trigger 1.1 is used to memorize the single messages arriving at the input of the device, trigger 1.3 is used to receive a decoded code combination and its sequential output, trigger 1.2 is used to memorize an undefined message. Prohibition elements 2.3, And 2.4 are designed to analyze the state of trigger 1.1 and correct received information, prohibition element 2.1 is for locking the installation input into trigger unit 1.1 upon receipt. to the input of the device is indefinitely sent, the prohibition element 2.5 is for storing by the trigger 1,2 the indefinite premise, the And elements 2.6 and 3.1, 3.2 and 3.3 are delays for the sequential operation of the elements of the Processing of the code parcel. Output 8 serves to synchronize a device receiving a decoded code pattern.

In the initial state, the outputs of all the triggers have zero potential. The device is restored to its initial state by applying a pulse to input 7.

The device operates as follows ..

In the first mode of operation, i.e. to receive a code of the form (1), zero potential is applied to input b. Therefore, at the exits

trigger 1.2 and elements 2.3 prohibition AND 2.4 ,. 2.6 also has zero potential, and these elements do not participate in the reception and decoding of the code combination received at input 4. Trigger 1.1 remembers a single package received among the first T + 1 packages, after which a pulse is applied to input 7. Pass elements 3.1 and 3.2 of the delay, he, upon entering the recording permissions of trigger 1.3, allows

recording in trigger 1.3 of the first element of the decoded code combination from trigger 1.1. Pass delay element 3.3, pulse zero trigger 1.1. Subsequent decoding occurs similarly. Reading the code combination from trigger 1.3 is synchronized by pulses at output 8 of the device.

In the second mode, the device is decoded by the formula (4) and operates as follows.

Unit 6 is supplied to input 6, T-code packages of the form (2) are received at input 4, trigger 1.1 remembers a single package. After the arrival of T + 1 packages (see Fig. 2}, an IQ pulse is applied to input 7. The delay time of the delay element 3.1 is chosen so that the pulse And appears at its output until the arrival of an indefinite package Z, and the pulse duration And is longer than the duration of the package Z, therefore, the prohibition element 2.1 for Z is closed. Let trigger 1.1 be in the single state, therefore, if the premise Z is single, it is the displaced single premise ag, the output potential of the trigger 1.2 will be 1. The code combination element from the trigger 1.1 texting to trigger 1.3 for pulse 2, and trigger 1.1 is reset to pulse 3 (as in the first mode).

Claims (1)

The claims DEVICE FOR PROCESSING T-CODES, containing the first trigger, the first inhibit element, the OR element, the first and second delay elements, and the clock input of the device is connected to the input. the first delay element, the output of which Q is connected to the input of the second delay element, the output of the first inhibit element is connected to the first input of the OR element, characterized in that, in order to expand the scope by decoding 45 T-codes, it contains the second and third triggers, second and third prohibition elements, first and second AND elements and a third delay element, the device information input being connected to the 50 first information input of the first prohibition element, with the first information input of the second prohibition element With a first input of the first AND gate and with yn ravl yuschim input of the third member 55 Za- preta, the information input of which is connected to the second input of the first element And, with the second information input -; house of the second prohibition element, with the control input of the first element After receiving T + 1 single parcels (the unit from aa is shifted by several spaces), trigger 1.1 remains in state O. On a pulse from input 7 at the output of the element And 2.6 appears, because trigger 1.2 is in a single state, and trigger 1.1 goes into state 1. On a pulse from the output of delay element 3.1, trigger 1.2 is reset to zero. 0 prohibition element 2.5, if the undefined parcel is zero, otherwise the trigger again remembers a single undefined parcel. Let trigger 1.1 be at zero 5 state, then, according to the impulse li, if the package is indefinite, the unit level appears at the output of the inhibit element 2.3 and the trigger 1.1 switches to the single state. 0 The device allows you to decode even and odd T-codes with the correction of unit bias errors in them. (56) USSR Copyright Certificate No. 5, No. 1.203711. class H 03 M 13/00, 1984. USSR Copyright Certificate No. 1832384, class. H 03 M 7/30, 06.22.88. V and with the output of the first delay element, the input of the device mode setting is connected to the third information input of the second inhibit element and with the third input of the first inhibit element AND, the output of the second inhibit element is connected to the second input And, the output of which is connected to the installation input in 1 of the first trigger, the input of the installation in О which is connected to the output of the third delay element, the input of which is connected to the output of the second delay element, with the recording enable input of the third trigger and is a clock output of the device, the output of which is connected to the output of the third trigger, the information input of which is connected to the output of the first trigger, with the control input of the second inhibit element and with the fourth input of the first element And, the output of which is connected to the installation input in 1 of the second trigger, the installation input to O and the output which are connected respectively with the output of the third inhibit element and with the first input of the second element I. the second input and output of which are connected respectively with the clock input of the device and with the third input of the OR element. UAUM WW P - P P .. Pl - P P .P ..-. P P P --v--, a -, -, and fr-f) / 2 (T-Sh (T-Sh (T + MZ