RU1833965C - Device for a/d conversion - Google Patents

Abstract

The invention relates to a digital electrical measuring technique and can be used in information-measuring systems, in particular, analog-to-digital converters (ADCs). The aim of the invention is to increase accuracy. The device contains two ADCs, a digital-to-analog converter, a control unit, a code adder, a sample-storage unit, and a subtraction unit. A positive effect is achieved due to the fact that, thanks to the introduction of a switch, a memory register and a code subtractor, it is possible to eliminate the error introduced by the sampling-storage unit by supplying a test signal close to the input signal to its input. 1 s.p. f-ly, 3 ill.

Description

The invention relates to digital electrical measurement technology and can be used in information measurement systems.

The aim of the invention is to increase accuracy.

In FIG. 1 is a schematic diagram of an analog-to-digital conversion device; in FIG. 2 is a time diagram of its operation; in FIG. 3 is an embodiment of a control unit circuit.

The circuit of the analog-to-digital conversion device contains: 1 - switch (P); 2 - sampling-storage unit (BVH); 3 - the first analog-to-digital converter (ADC1); 4 - digital-to-analog converter (DAC); 5 - subtraction unit (BV); 6 - the second analog-to-digital converter (ADC2); 7 - memory register

(SP); 8 - code subtractor (VK); 9 - adder codes (SC); 10 - control unit (CU).

The circuit elements are connected as follows: the first input P is the input of the entire device, the second input P is connected to the DAC output and the inverse input of the BV, the output P is connected to the input of the BVC, the output of the BVC is connected to the input of the ADC1 and the direct input of the BV, the output of the ADC1 is connected to the DAC control input and the first input of the SC, the output of the BV is connected to the input of the ADC2, the output of the ADC2 is connected to the input of the SR and the direct input of VK, the output of the SP is connected to the inverse input of VK, the output of VK is connected to the second input of the SK, the output of SK is the output of the whole device , second, third and fourth exits B CVS connected to the control inputs, ADC1 and ADC2, respectively, additional BU outputs 1 and 5

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connected to the control inputs P and ZR, the sixth input of the control unit is the start bus of the entire device.

The numbering of the diagrams in FIG. 2 corresponds to the numbering of the outputs of the control unit, the control unit shown in FIG. 3 is made up of 10 single-vibrators (blocks 10.1 - 10.9 and 10.12) and two OR circuits (blocks 10.10 and 10.11).

The circuit of the analog-to-digital conversion device works as follows: after a command is sent to the input of the control unit, start-up P supplies the input signal (U1) to the input of the BVC. After a period of time t1 (hereinafter, see Fig. 2), the input signal is memorized by it (the BVH switches from the tracking mode to the storage mode). Further, after a period of time t2, determined by the end of the transient processes in BVC, ADC1 converts its output voltage (U2) to code (N1), which is fed to the control input of the DAC and converted to voltage U3. Then, after a period of time t3, determined by the speed of the DAC and BW, the output voltage of the BV equal to U2-U3 is converted by the ADC2 into a code (N2), which is stored in the SR. After this, at the command of the control unit, the voltage U2 is supplied to the input of the BVX, which is stored by it (in this case, the voltage U4 is generated at the output of the BVX). The BV subtracts the voltage U3 from U4, the resulting voltage U5 after the end of the transition process at the output of the BV (t4) is converted to code N3. Next, BK subtracts code N3 from code N2, and the result of the SC sums with code N1. As a result, code N4 is generated at the output of the SC, which is the output code of the device.

Consider obtaining a positive effect in more detail. Denote the error BVH - A 1, and the error of the ADC1 - A2. Wherein:

U2 U1. + A1, U3 U2 + A2,

(1)

(2)

DAC error is neglected. As can be seen from expressions 1 and 2, the code N2 is proportional to A2. As

U4 U2 + A 1,

then U5 A 1. As a result, the output code N4 N1 - (- N2 - N3 is free from the errors of ADC1 and BVX. In the prototype, the output code is free only from the errors of ADC1 (3). Due to this, the accuracy is significantly increased, since the errors of BVC are usually constitute 0.1% - 0.03%. which inhibits

their use at the input of multi-bit ADCs (on the order of 15-16 binary bits). Converters without BVH have a large dynamic error.

An analog-to-digital conversion device can be performed on the following elements: ADC1 and ADC2 - K1108PV1A, DAC - M2PAC4171, BVH - K110.0SK2, P - K590KNZ, BV - on an operational amplifier of the K140UD17 type with resistors (according to the standard circuit), BU - on microcircuits of type K155AGZ and K561LL1, SK and VK - on microcircuits of type K561 IM1.

Claims (2)

1. An analog-to-digital conversion device containing the first and second analog-to-digital converters, a digital-to-analog converter, a subtraction unit, a code adder, a control unit and a sampling-storage unit, the output of which is connected to the input of the first analog-to-digital converter, the outputs of the first analog - the digital converter is connected to the corresponding inputs of the digital-to-tax converter and the first inputs of the code adder, the output of the digital-to-analog converter is connected to the inverse input of the subtraction unit, pr my the input of which is connected to the output of the sample-storage unit, and the output is connected to the input of the second analog-to-digital converter, the output of the code adder is the output bus, the first, second, and third the outputs of the control unit are connected to the control inputs of the sample-storage unit, the first analog-to-digital converter and the second analog-to-digital converter, respectively, and its input is Start bus, with the exception that, in order to improve accuracy, a switch, a memory register and a code subtractor are introduced into it, the first input of the switch being an input bus, the second input is connected to the output of the digital-to-analog converter, and the output is connected to the input of the sample-storage unit, the direct inputs of the code subtractor combined by the inputs of the memory register are connected to the corresponding outputs of the second analog-to-digital converter, the outputs of the code subtractor are connected to the corresponding second inputs of the code adder, and its inverse inputs are connected to the output of the memory register, respectively, the fourth and fifth outputs of the control unit are connected to the control inputs of the switch and Mina register respectively. 2. The device according to claim 1, characterized in that the control unit is made up of ten single vibrators and two OR elements, the outputs of which are the first and third outputs of the block, the outputs from the first to fifth single vibrator are combined and are the input of the block , the output of the first one-shot is the fourth output of the unit and through the sixth one-shot is connected to the first input of the first OR element, 0 the second input of which is connected to the output of the second one-shot, the output of the third one-shot through the seventh one-shot is the second output of the block, the outputs of the fourth and fifth one-shots, respectively, through the eighth and tenth single-vibrators are connected to the first and second inputs of the second OR element, the input of the tenth one-shot connected to the output of the first one-shot, and its output is the fifth output of the unit. CFS fu-i. 3