RU1830622C - Time interval/code converter - Google Patents

Description

the front of this pulse starts the converter 16, which, at the end of the conversion time, generates at its information outputs the voltage code Uti, which is supplied to its analog input from the output of block 15, j also generates a unit level signal at the output of conversion, which is input to the input of element 17. Element 17 records the code for adder 18 and resets converter 16 at the Reset input.

At the end of the signal of the bus 19, the key 7 is closed, and the key 6 is opened, and the voltage from the output of the integrator 2 is supplied to the analog input of the block 15 through the block 5. A one-shot 14 is triggered on the trailing edge of the signal from the bus 19, the pulse from which is output (Fig.2e ) passes through element 1-2 to the control input of block 15 and input Start of converter 16. On the trailing edge of the pulse from the output of element 12, block 15 stores the potential of the level Ut2 that occurs at the time t2 at the end of the signal of the unit level from bus 19, and on the trailing edge of this impulse converter 16 is started, which, at the end of the conversion time, generates a voltage code of level Ut2 at its information outputs. coming to its analog input from the output of block 15, and element 17 records this code in the adder 18 and reset the converter 16 at the reset input.

The time elapsed from the beginning of the measured time interval to the moment the first pulse appears at the output of element 8 can be expressed in terms of the voltage DH fixed by unit 15. At time ti, as follows:

Uti T NtiU

.- I

U

max

 f

Nti 2P

where NH is the converter code 16 corresponding to the voltage Uti; n and U are the bit and voltage quantum of the converter 16.

The time Ha, which has passed from the moment of the appearance of the last pulse at the output of element 8 to the moment 12 of the end of the measured time interval, can be expressed in terms of voltage Ut2. fixed by block 15 at time t2, as follows:

Nt2

G2 T

n

where Nt2 is the code of the converter 16 corresponding to the voltage Ut2 After the NH and Nt2 codes arrive in the adder 18, a code corresponding to the duration r n + + T2 is generated in its n bits. In the case of overflow of the adder 18, the transfer pulse from it (n + 1) - th output through element 11 enters the counting input

The counter is 10, and its contents are incremented by one.

Thus, the readings of the counter 10 correspond to the high order bits, and the readings of the adder 18 correspond to the n low order bits

 code of the measured time interval.

The advantage of the proposed converter in comparison with the prototype is its simplicity, due to the absence of such elements as a direct code to additional converter, code switch, D-trigger, a trigger with a counting input, a comparator, and a much smaller number of logic elements.

0

Claims (1)

The claims A time interval converter into a code containing an integrator, a reference frequency generator, the output of which is connected to the first input of the And element, the second the input of which is combined with the inputs of the first and second single vibrators and is an input bus, the output of the AND element is connected to the first input of the first OR element, the output of which is connected to the clock input of the counter, the outputs of which are the high-order output bus, the low-order output bus are the outputs of the accumulating adder, with the exception of the high output bit, connected to the second input of the first OR element, the clock input of the accumulating adder is combined with the input Reset analog-to-digital conversion tel and is connected to the output of the delay element, the input of which is connected to the output. The end of the conversion of an analog-to-digital converter, the analog input of which is connected to the sampling and storage element, the control input of which is combined with input Start-up of an analog-to-digital converter and connected to the output of the second OR element, the first and second inputs of which are connected to the outputs of the first and second single-vibrators, respectively, which, in order to simplify, introduces a reference voltage source, a subtractor, an adder , the inverter and the first and second keys, the outputs of which are connected to the corresponding inputs of the adder, the output of which is connected to the analog input of the sampling and storage element, the information inputs of the accumulating adder are connected to the corresponding to the analog-to-digital converter outputs, the output of the reference frequency generator is connected to the reset input of the integrator, the analog input of which is combined with the summing input of the subtractor and connected to the input of the reference source voltage, the subtractor subtractor input is combined with the analog input of the first key and connected to the integrator output, the control input of the first key is connected to the inverter output, the input of which is combined with the control input of the second key and connected to the input bus, the analog input of the second key is connected to the output subtractor. t