RU122535U1 - ANALOG-DIGITAL CONVERTER - Google Patents

Abstract

An analog-to-digital converter containing a generator of weighting functions, a programmable logic matrix and a multichannel signal generation module, each channel of which includes a scale amplifier and a serially connected generator of weight coefficients, an adaptation unit and a block of comparators, while in each channel the output of the scale amplifier is connected to to the corresponding input of the adaptation block, the output of which is connected to the first input of the comparator block, connected by outputs to the corresponding inputs of the programmable logic matrix, all information outputs of the adaptation block of each channel are connected to the corresponding control inputs of the adaptation blocks of all channels having subsequent serial numbers, the corresponding output of the adaptation block of each channel, except for the last one, is connected to the input of the scale amplifier of the channel having the next serial number, the input of the weighting factor generator and the second input of the block of comparators of each channel are connected to the corresponding outputs of the generator of weighting functions, and the number of information outputs and control inputs of each adaptation block of the multichannel signal generation module is determined by the dependencies K = Nn, K = n-1, where Ki K is the number of information outputs and control inputs of each adaptation block, respectively, N and n - the number of channels and the number of the channel, respectively, while the input of the scale amplifier of the first channel is intended to be connected to an external source of an analog signal, and the supply inputs of the constituent elements and blocks of the analog-to-digital converter are designed to be connected

Description

The utility model relates to the field of digital technology, in particular, to devices for converting analog voltage to digital code.

Known analog-to-digital converter (ADC), which includes an M-bit ADC1 with a series resistive divider and an M-bit digital-to-analog converter (DAC) connected to a Vref reference source with an in-phase level Vcm, a device for sampling and storing the difference signal of the ADC input and the output voltage of the DAC with a gain of F and ADC2 with a differential reference voltage Vref2 less than Vref. An M-bit DAC includes two groups of keys that connect a selected pair of symmetrically arranged taps of a series resistive divider to the differential outputs of the DAC, the output voltages of the sampling and storage device and the differential reference voltage of the ADC2 have a common mode level Vcm2, and Vref2 is equal to F · Vref / 2 M-1 moreover, F does not exceed 2 (RU, No. 2341017, H03M 1/14, 09/29/2006).

A disadvantage of the known technical solution is the presence of inertial elements in its composition: analog keys, analog memory and digital-to-analog converter, which leads to a significant decrease in the speed of analog-to-digital conversion.

A known analog-to-digital converter of a dynamic type, containing a reference voltage source and a group of comparators, the number of "n" of which is equal to the bit depth of a binary code representing the converted analog voltage in digital form, ordered in order of the bit numbers of the binary code so that some k-th comparator forms k-th bit of the output code. The first inputs of the same name of the comparators are connected and the input signal voltage is applied to them. The device contains a group of digital-to-analog converters, the number of which is equal to the number of comparators, the reference inputs of which are connected to a reference voltage source. The output of the first digital-to-analog converter is connected to the second input of the low-order comparator, and the output of each subsequent digital-to-analog converter is connected to the second input of the comparator of the next bit. The number of inputs of the digital-to-analog converter connected to the comparator with the kth serial number is equal to the difference between the number of bits of the converter and the serial number of the comparator. The digital input of the highest bit of the digital-to-analog converter with the kth serial number is connected to the output of the comparator of the highest bit, each subsequent input of the k-th digital-to-analog converter is connected to the output of the subsequent comparator, and the digital inputs of the least significant bits of the digital-to-analog converters are connected to they are given the value of a logical unit, while the digital-to-analog converter of the senior comparator is a divider for two reference voltages (RU, No. 2389133, H03M 1/12, H03M 1/36, 12/23/2008).

A disadvantage of the known technical solution is the low speed of the analog-to-digital conversion, due to the presence of digital-to-analog converters in the analog-to-digital converter.

Known analog-to-digital serial converter containing differential amplifiers, a comparator, a direct current amplifier, analog storage devices, a control device, a serial to parallel converter, a counter modulo M, keys, an inverter, an input stage for determining the sign and inverting negative voltages (RU , No. 2245000, H03M 1/36, 02/11/2003).

A disadvantage of the known analog-to-digital Converter is the low speed due to the presence of inertial elements in it, such as analog keys and analog memory. Carrying out bitwise analysis by this converter makes its characteristics identical to the characteristics of an analog-to-digital converter of successive approximation and leads to a decrease in its speed.

The objective of the utility model is to increase the efficiency of the process of converting an analog signal to a digital code.

The technical result achieved in solving the problem is to increase the speed of the process of converting an analog signal to a digital code.

The problem is solved, and the technical result is provided by an analog-to-digital converter containing a weight function generator, a programmable logic matrix and a multi-channel signal generation module, each channel of which includes a scale amplifier and series-connected weight generator, adaptation unit and comparator unit, while each channel the output of the scale amplifier is connected to the corresponding input of the adaptation unit, the output of which is connected to the first input of the comparator unit s, connected by the outputs to the corresponding inputs of the programmable logic matrix, all the information outputs of the adaptation block of each channel are connected to the corresponding control inputs of the adaptation blocks of all channels having subsequent serial numbers, the corresponding output of the adaptation block of each channel, except the last, is connected to the input of the channel scale amplifier, having the following serial number, the input of the shaper weights and the second input of the block of comparators of each channel are connected to the corresponding outputs of the generator of weight functions, and the number of information outputs and control inputs of each adaptation block of a multi-channel signal generation module is determined by the dependencies

where Kinf and Cupr are the number of information outputs and control inputs of each adaptation block, respectively,

N and n are the number of channels and the channel number, respectively,

the input of the large-scale amplifier of the first channel is designed to connect to an external source of an analog signal, and the supply inputs of the components and blocks of the analog-to-digital converter are made with the possibility of connecting to an external power supply.

The figure shows a functional diagram of an analog-to-digital Converter.

The analog-to-digital converter contains a weight function generator 1, a programmable logic matrix 2 and a multi-channel signal generation module 3, each channel of which includes a scale amplifier 4 and series-connected weight former 5, adaptation unit 6 and comparator unit 7. In each channel, the output of the scale amplifier 4 is connected to the corresponding input of adaptation block 6, the output of which is connected to the first input of comparator block 7, connected by outputs to the corresponding inputs of programmable logic matrix 2. All information outputs I1, I2, I3, ..., In of adaptation block 6 of each channel are connected to the corresponding control inputs Y1, Y2, Y3, ..., Yn of adaptation blocks 6 of all channels having subsequent serial numbers. The corresponding output of the adaptation unit 6 of each channel, except the last, is connected to the input of the scale amplifier 4 of the channel having the following serial number, the input of the weight generator 5 and the second input of the comparator unit 7 of each channel are connected to the corresponding outputs of the weight function generator 1. The number of information outputs I1, I2, I3, ..., In and control inputs Y1, Y2, Y3, ..., Yn of each adaptation unit 6 of the multi-channel signal generation module 3 is determined by the dependencies

where Kinf and Cupr are the number of information outputs and control inputs of each adaptation block 6, respectively,

N and n are the number of channels and the channel number, respectively.

The input of the large-scale amplifier 4 of the first channel is intended to be connected to an external source of an analog signal (not shown in the figure), and the power inputs of the components and units of the analog-to-digital converter are configured to be connected to an external power supply (not shown in the figure). Scale amplifier 4 is built on an operational amplifier manufactured by Analog Device AD8036.

An analog-to-digital converter operates as follows.

From an external power supply (not shown in the figure), the supply voltage is supplied to the power inputs of the components and units of the analog-to-digital converter. The input of the large-scale amplifier 4 of the first channel, which is designed to be connected to an external source of an analog signal (not shown in the figure), receives an analog signal that is subject to subsequent conversion. The generator 1 weight functions and the generator 5 weight coefficients set and generate analog signals v = {v ₁ ... v _n } for the respective adaptation blocks 6 and constant values of the reference voltages for block 7 comparators of each channel of the multi-channel signal generation module 3. The formation of constant coefficients and constant values of the reference voltage is performed when setting up the analog-to-digital converter depending on the measured range of the input signal and on the bit depth of the analog-to-digital converter. Scale amplifier 4 performs the normalization (scaling) of the input signal (or the corresponding input) depending on the specified parameters of the analog-to-digital converter. Block 6 adaptation of each channel of the multi-channel module 3 signal generation produces:

- functional transformations of the analog signal depending on the voltage values obtained on the previous adaptation blocks 6, and the voltage values obtained from the generator 1 weight functions and the shaper 5 weight coefficients;

- conversion (adaptation) of the analog signal for its output from the corresponding information outputs I1, I2, I3, ..., In of the adaptation block 6 to the corresponding control inputs Y1, Y2, Y3, ... Yn of the adaptation blocks 6 of the channels having subsequent serial numbers, and large-scale amplifier 4 of the subsequent channel;

- conversion (formation) of an analog signal for supplying it to block 7 of the comparators of the corresponding channel.

Block 7 of the comparators convert the analog signals received from blocks 6 adaptation, in digital form (threshold values 1/0). At the outputs from block 7 of the comparators, digital signals are obtained, described by two sequences {x ₁ ... x _n } and . In the general case, the values of the input signals on each of the n blocks of 7 comparators are defined as follows: B ₁ = F (U _I ), B ₂ = F (B ₁ , B ₂ , ... B _n-1 , U _I ), where F - function linearly dependent on the values supplied from the shaper 5 weight coefficients and scale amplifier 4. Thus, F = F (B, C, K), where C and K are constants defined respectively by scale amplifiers 4 and shapers 5 weight coefficients . In the particular case, in the absence of cross-connections, the value of the input signal on the k-th block of 7 comparators is determined as follows: B _k = G (G ... G (U _in ) ...), where G is some function that is taken exactly k times, and in a similar way, like F, it has a linear dependence on the constants C and K. G = G (B, C, K).

The signals from the outputs of block 7 of the comparators are fed to the corresponding inputs of the programmable logic matrix 2. The values of the sequences at its inputs are determined as follows: xk = 0 if B _k > v _k , and 1 otherwise. Values if B _k = v _k and 0 when the values are different. The values of the sequence {v ₁ ... v _k ) are set by the generator 1 of weight functions. The programmable logic matrix 2 converts the digital code received from the comparator units 7 into a sequence of bits representing the original signal in the digital code.

The proposed analog-to-digital converter does not contain inertial elements, such as digital-to-analog converters, analog switches, counters, generators, etc. In the proposed technical solution, all the coefficients generated by the generator 1 of the weight functions are formed when tuned to the appropriate class of an analog-to-digital converter, depending on the bit depth and measurement range. All functional transformations carried out by adaptation units 6 are performed with analog signals on analog elements (transistors). The digital part of the circuit (programmable logic matrix 2) is essentially a decoder, which contributes to the manufacturability of the proposed technical solution, since there is no need to decouple the digital part of the circuit from the analog one. The conversion time slightly depends on the number of bits of the analog-to-digital converter and is determined by the signal processing times by large-scale amplifiers 4 and adaptation units 6. The proposed analog-to-digital converter is distinguished by its simplicity of architecture. Its structure contains the smallest, in comparison with the known analog-to-digital converters, the number of adjustable elements. The number of elements of the proposed analog-to-digital Converter, as in the serial converter, is proportional to the number of discharges.

Claims (1)

An analog-to-digital converter containing a weight function generator, a programmable logic matrix and a multi-channel signal generation module, each channel of which includes a scale amplifier and series-connected weight former, an adaptation unit and a comparator unit, while in each channel the output of the scale amplifier is connected to the corresponding input of the adaptation unit, the output of which is connected to the first input of the comparator unit, connected by the outputs to the corresponding inputs of the program of the summed logic matrix, all the information outputs of the adaptation block of each channel are connected to the corresponding control inputs of the adaptation blocks of all channels having subsequent serial numbers, the corresponding output of the adaptation block of each channel, except the last one, is connected to the input of the scale amplifier of the channel having the following serial number, the shaper input weight coefficients and the second input of the comparator block of each channel are connected to the corresponding outputs of the generator of weight functions, and the number of inform tional outputs and control inputs of each block adapting multi-channel generating unit signals determined dependencies K _inf = Nn, K _Ex = n-1, where R _inf and K _simp - number of data outputs and control each adaptation unit inputs, respectively, N and n - number of channels and the channel number, respectively, while the input of the large-scale amplifier of the first channel is designed to connect to an external source of an analog signal, and the supply inputs of the components and blocks of the analog-to-digital converter are made with the possible Connectivity to an external power supply.