RU111946U1 - FREQUENCY SYNTHESIS - Google Patents

Abstract

 A frequency synthesizer comprising a reference generator, a control command generator, a frequency meshing unit, consisting of a first mixer, a first bandpass filter, a first divider and a first low-pass filter, an up-frequency conversion unit, consisting of a second bandpass filter and a second mixer, a filter and a digital direct synthesis synthesizer, the control input of which is connected to the output of the control command generator, the output of the digital direct synthesis synthesizer is connected through the filter to the intermediate input often s first mixer in the block forming the grid frequency, a first mixer output is connected via a first bandpass filter with a high frequency input of the first divider, the output of which is connected via a first low-pass filter to the input of the second intermediate frequency mixer in the frequency conversion section upwardly; the input of the local oscillator of the second mixer is connected to the output of the reference generator; the output of the second mixer is connected to the second band-pass filter, the output of which is the output of the synthesizer, characterized in that the first divider is configured to switch the division factor and has a control input connected to the output of the control command generator; additionally, a local oscillator signal generating unit has been introduced, consisting of a third mixer, a third band-pass filter and a second divider with a switchable division coefficient having a high-frequency input and a control input, while the high-frequency input of the second divider and the local oscillator input of the third mixer are connected to the output of the reference generator; the control input of the second divider is connected to the output

Description

The utility model relates to radio engineering and can be used in radar, in measurement technology, in communication technology.

The main parameters of the synthesizers are: the output frequency tuning range, the frequency tuning step, the tuning speed, the level of spurious spectral components, and the spectral density of phase fluctuations.

Known frequency synthesizers [Appendix. Starikov O. PLL method and principles of synthesizing high-frequency signals // ChipNews. 2001], built on the basis of a phase locked loop (PLL), which are currently the most common. The basic PLL loop synthesizer circuitry is a connected reference frequency generator, a phase detector, a low-pass filter, a voltage-controlled oscillator (VCO), and a divider in the feedback circuit connecting the VCO output and the phase detector. The advantage of these devices is the simplicity of implementation: a small number of elements and the ability to perform on a monolithic-integrated technology.

One of the drawbacks of such synthesizers is the increased level of phase noise, which is determined by the noise of the digital phase detector inside the passband of the PLL and the phase noise of the VCO outside the band of the PLL. Another disadvantage is the low frequency tuning rate due to filtering of the error signal.

Known synthesizer (US patent No. 4791377), which consists of four generators with a PLL, a command generator, a digital direct synthesis synthesizer (DSPC), frequency conversion and division units, and a frequency conversion unit. Each frequency conversion and division unit consists of a mixer, a band-pass filter and a divider with a fixed division coefficient. The frequency conversion unit consists of a mixer and a bandpass filter. The advantages of this synthesizer are a wide frequency tuning band of the output signal and a high frequency tuning frequency.

However, in this device it is not possible to provide a high level of suppression of spurious spectral components due to the small value of the division ratio of the frequency dividers and the structure of the conversion and frequency division blocks, in which multiple frequencies arrive at the inputs of the local oscillator and the inverter of the mixers. At the same time, the signal frequency at the input of the inverter of the mixers is only 3 times less than the frequency at the input of the mixer local oscillator, which leads to the combination of low-order combination components with a high level in the passband of the bandpass filter at the output of the mixer.

Closest to the claimed device is a frequency synthesizer (US patent No. 54495202), which consists of a reference generator, DSPC, a frequency conversion and division unit, and a frequency conversion unit up. The frequency conversion and division unit consists of a mixer, a band-pass filter, a divider with a fixed division coefficient and a low-pass filter. The up-conversion unit consists of a mixer and a band-pass filter. By converting the DSPC signal to the high frequency range and subsequent frequency division, a reduction in the level of spurious discrete components in the output signal spectrum is achieved to the desired level while maintaining a high frequency tuning rate. The frequency conversion unit up transfers the output frequency of the conversion and frequency division unit to the required frequency range. The advantages of this synthesizer are the high purity of the output signal spectrum and the high frequency tuning speed.

The disadvantage of this synthesizer is the narrow frequency tuning range, since the resulting output frequency tuning band is D times smaller than the DSP frequency tuning range, where D is the divisor division factor.

The objective of the claimed utility model is to increase the frequency tuning range of the synthesizer while ensuring high purity of the output signal spectrum and high output frequency tuning speed.

The essence of the claimed utility model is that a frequency synthesizer comprising a reference generator, a control command generator, a frequency meshing unit, consisting of a first mixer, a first band-pass filter, a first divider and a first low-pass filter, an upward frequency conversion unit, consisting of a second a band-pass filter and a second mixer, a filter and a digital synthesizer of direct synthesis, the control input of which is connected to the output of the shaper control commands, the output of a digital synthesizer direct synthesis is connected through the filter to the intermediate frequency input of the first mixer in the frequency grid forming unit, the output of the first mixer is connected through the first bandpass filter to the high-frequency input of the first divider, the output of which is connected through the first low-pass filter to the intermediate frequency input of the second mixer in the up-conversion unit; the input of the local oscillator of the second mixer is connected to the output of the reference generator; the output of the second mixer is connected to the second bandpass filter, the output of which is the output of the synthesizer, the first divider is configured to switch the division factor and has a control input connected to the output of the control command generator; additionally, a local oscillator signal generating unit has been introduced, consisting of a third mixer, a third band-pass filter and a second divider with a switchable division coefficient having a high-frequency input and a control input, while the high-frequency input of the second divider and the local oscillator input of the third mixer are connected to the output of the reference generator; the control input of the second divider is connected to the output of the control command generator; the output of the second divider is connected to the intermediate frequency input of the third mixer, the output of which through the third bandpass filter is connected to the local oscillator input of the first mixer.

The technical result of the claimed utility model is to solve the problem by introducing the inventive design and the use of the inventive design and using a divider with a switchable coefficient as a divider in the frequency grid forming unit. As a result, the frequency tuning range of the inventive synthesizer is 5-10 times larger than in the device of US Pat. No. 5,495,202, with the same level of suppression of spurious spectral components of the DSPC and a high frequency tuning speed.

The inventive utility model is illustrated using Fig.1-2, which depict:

figure 1 is a structural diagram of a frequency synthesizer;

figure 2 is a diagram of the frequency adjustment.

In figure 1, the positions 1-16 are indicated:

1 - digital direct synthesis synthesizer (DSPC);

2 - reference generator;

3 - control command shaper (PKU);

4 - filter;

5 - block forming a grid of frequencies (BFSCH);

6 - block frequency conversion up (BPC);

7 - a unit for generating local oscillator signals (BFSH);

8 - the first mixer;

9 - the first band-pass filter (PF);

10 - the first divider with a switchable division ratio (DPKD);

11 - the first low-pass filter (low-pass filter);

12 - second mixer;

13 - second PF;

14 - second DPKD;

15 - the third mixer;

16 - the third PF.

The frequency synthesizer consists of a connected direct synthesis digital synthesizer (DSPC) 1, a reference oscillator 2, a control command shaper (FCU) 3, a filter 4, a frequency meshing unit (BFCH) 5, a frequency conversion unit up (BPCW) 6 and a signal generating unit local oscillator (BFSH) 7. The frequency meshing unit (BFSCH) 5 consists of a first mixer 8, a first band-pass filter (PF) 9, a first divider with a switchable division ratio (DPKD) 10 and a first low-pass filter (LPF) 11. Conversion unit frequency up (LFW) 6 s it consists of a second mixer 12 and a second PF 13. The local oscillator signal generation unit (BFSH) 7 consists of a second DPKD 14, a third mixer 15 and a third PF 16. A DSPC 1 is connected through a filter 4 to an intermediate frequency input (IF) of the first mixer 8 in the BFPS 5. The output of the first mixer 8 is connected through the first PF 9 to the high-frequency input (HF) of the first DPKD 10. The output of the first DPKD 10 is connected through the first LPF 11 to the input of the inverter of the second mixer 12, the local oscillator input of which is connected to the output of the reference generator 2. The output of the second mixer 12 is connected to the second PF 13. Output the latter is the output of the BPCV 6. The input of the local oscillator of the third mixer 15 and the RF input of the second DPKD 14 are connected to the output of the reference generator 2. The output of the second DPKD 14 is connected to the input of the inverter of the third mixer 15, the output of which through the third PF 16 is connected to the input of the local oscillator of the first mixer 8. The control inputs of the DSPC 1, the first DPKD 10 and the second DPKD 14 are connected to the output of the FCU 3.

The device operates as follows.

The reference generator 2 provides the formation of three coherent signals of a fixed frequency.

One of the signals of the reference generator 1 with a frequency f _{OP2 is} fed to the input of the BFSG 7, in which, branching, it is fed to the RF input of the second DPKD 14 and the input of the local oscillator of the third mixer 15. The division coefficient D _{1 of the} second DPKD 14 is set by PKU 3 in the range from D _1min to D _1max . To do this, from the output of the PKU 3 to the control input of the second DPKD 14 receives a control signal. From the output of the second DPKD 14, a signal with a frequency f _OP2 / D _{1 is} fed to the input of the inverter of the third mixer 15. At the output of the third mixer 15, the useful signal has a frequency:

.

The unwanted spectral components of the signal are suppressed using the third PF 16, which can be tuned to the total (f _OP2 + f _OP2 / D ₁ ) or differential (f _OP2 -f _OP2 / D ₁ ) component of the signal frequency from the output of the third mixer 15. Further for definiteness, we will take into account that the filters are tuned to the total signal component at the output of the mixers. This choice does not affect the operation of the claimed device. Since the frequency f _{OP2 is} fixed, then at the output of the BFSG 7 the number of generated frequencies will correspond to the number of division factors D _{1 of the} second DPKD 14. Frequency values are determined by the formula f _OP2 (1 + 1 / D ₁ ). The frequency tuning step will be the largest for the values of D ₁ = D _1min and D ₁ = D _1min +1 and can be calculated by the formula: .

From the output of the BFSG 7, the signal is fed to the input of the local oscillator of the first mixer 8 of the frequency meshing unit (BFSCH) 5. The input from the inverter of the first mixer 8 receives a signal from the output of the DSPC 1 through the filter 4. The signal from the output of the reference oscillator 1 receives the signal from the output of the reference oscillator 2 s frequency f _OP3 , to the control input from the output of the FCU 3. Using DSPC 1 form a signal with a frequency in accordance with the formula:

,

where S is the capacity of the accumulating adder TsPSS 1; R is the value of the code that controls the frequency of the DSPC 1 generated by the PKU 3, f _OP3 is the clock frequency of the DSPC 1 generated by the reference generator 2. The signals from the output of the first mixer 8 will have the frequency:

f _CM1 = f _OD2 (1 + 1 / D ₁ ) ± f _DSCC .

Using the first PF 9, one of the signals from the output of the first mixer 8 is isolated, suppressing all undesirable combination components.

If the width of the tuning band of the DSPC 1 is Δf _DSPC , then at the output of the first PF 9 it will be possible to generate a signal with any frequency value in the band:

.

The bandwidth of the signal from the output of the first PF 9 will be wider than the tuning band of the DSPC 1 due to the possibility of changing the division coefficient D _{1 of the} second DPKD14 in BFSG 7.

Since the signal generated by DSPC 1 contains parasitic components due to the features of its operation, they will also be contained in the output signal of the synthesizer. Their level is reduced by dividing the frequency. To do this, from the output of the first PFD 9, the signal is fed to the RF input of the first DPCD 10. When dividing the frequency using the first DPCD 10, the level of spurious components will decrease by 20 lgD ₂ , where D ₂ is the value of the division factor of the first DPCD 10. However, the tuning bandwidth in D will decrease ₂ times To expand the range of tuning the frequency of the output signal, a divider with a switchable division factor is used, providing frequency tuning at the RF input of the first DPKD 10, sufficient to overlap portions of the tuning range of the signal frequency at the output of the first DPKD 10 at selected values of the division coefficient D ₂ . The division coefficient D _{2 is} changed using PKU 3, applying from its output a control signal to the control input of the first DPKD 10. A diagram of the tuning of the output frequency of the first DPKD 10 for various division coefficients D _{2 is} shown in FIG. 2. In order to provide the possibility of generating any frequency at the synthesizer output in the range from f _{o min} to f _{o max} , it is necessary that, with a dividing factor of D ₂ and the minimum required frequency of the DSPC signal 1 f _{in min, the} value of the frequency of the output signal should be less than or equal to the value of the output frequency with a division factor increased by one, i.e. at D ₂ +1, and the maximum frequency of the DSPC signal 1f _{in max} . To ensure overlapping sections of the adjustment when the values of the division coefficients D _2min and D _2min +1 required the largest range of adjustment. The required tuning bandwidth at which continuous frequency tuning is possible is determined from the condition:

,

where f _{CM 1 min (max)} is the minimum (maximum) possible value of the output frequency of the first mixer 8; D _2min is the smallest division coefficient of the first DPKD 10.

In this case, the width of the adjustment band at the output of the first DPKD 10 will be equal to:

.

The full frequency tuning range, taking into account the possibility of switching the division coefficient D _{2 of the} first DPKD 10, can be calculated by the formula:

,

where f _{DPKD min (max)} - the minimum (maximum) possible value of the frequency at the output of the first DPKD 10; D _{2min (max)} is the smallest (largest) division coefficient of the first DPKD 10.

The signal from the output of the first DPKD 10 with a frequency f of the _DPKD through the first low-pass filter 11 is fed to the input of the inverter of the second mixer 12, the input of the local oscillator of which receives a signal of a fixed frequency f _OP1 from the reference generator 2. At the output of the second mixer 12, a signal with a frequency f _CM2 = f _OD1 ± / f _DPKD . Using the second PF 13 at the output of the second mixer 12 allocate the total or difference component of the signal, which is the useful frequency of the synthesizer signal. The frequency conversion using the second mixer 12 is necessary to increase the frequency of the output signal, which compensates for the lowering of the frequency during division in the first DPKD 10 and allows you to obtain the desired frequency values of the output signal of the synthesizer.

Compared with the technical solution described in US patent No. 5495202, the proposed synthesizer circuit allows a wider frequency tuning band to be obtained by expanding the frequency tuning range of the DSPC 1 when it is converted with different values of the local oscillator frequency of the third mixer 15 and using several values of the division coefficient in the second DPKD 14. As a result, the frequency tuning range of the synthesizer is 5-10 times larger than in the device according to US patent No. 5495202, with the same level of suppression of parasitic spectrum lnyh components TSSPS 1 and the same value of the frequency tuning rate.

Claims (1)

A frequency synthesizer comprising a reference generator, a control command generator, a frequency grid forming unit consisting of a first mixer, a first bandpass filter, a first divider and a first lowpass filter, an upward frequency conversion unit consisting of a second bandpass filter and a second mixer, a filter and a digital direct synthesis synthesizer, the control input of which is connected to the output of the control command generator, the output of the digital direct synthesis synthesizer is connected through the filter to the intermediate input often s first mixer in the block forming the grid frequency, a first mixer output is connected via a first bandpass filter with a high frequency input of the first divider, the output of which is connected via a first low-pass filter to the input of the second intermediate frequency mixer in the frequency conversion section upwardly; the input of the local oscillator of the second mixer is connected to the output of the reference generator; the output of the second mixer is connected to the second bandpass filter, the output of which is the output of the synthesizer, characterized in that the first divider is configured to switch the division factor and has a control input connected to the output of the control command generator; additionally, a local oscillator signal generating unit has been introduced, consisting of a third mixer, a third band-pass filter and a second divider with a switchable division ratio having a high-frequency input and a control input, while the high-frequency input of the second divider and the local oscillator input of the third mixer are connected to the output of the reference generator; the control input of the second divider is connected to the output of the control command generator; the output of the second divider is connected to the intermediate frequency input of the third mixer, the output of which through the third bandpass filter is connected to the local oscillator input of the first mixer.