CN211830747U - Link structure of ultralow phase noise and low stray stepping frequency source - Google Patents
Link structure of ultralow phase noise and low stray stepping frequency source Download PDFInfo
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- CN211830747U CN211830747U CN201922222807.0U CN201922222807U CN211830747U CN 211830747 U CN211830747 U CN 211830747U CN 201922222807 U CN201922222807 U CN 201922222807U CN 211830747 U CN211830747 U CN 211830747U
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Abstract
The utility model discloses a link structure of ultralow phase noise and low stray step-by-step frequency source, divide ware, decimal frequency multiplier, high-speed phase discriminator, loop filter, voltage controlled oscillator, second merit to divide ware, loop radio frequency amplifier, mixer, low pass filter, comb spectrum frequency multiplier and band pass filter including crystal oscillator, first merit, the output of crystal oscillator links to each other with the input of first merit branch ware. The link structure of the ultralow phase noise and low spurious stepped frequency source adopts a mixed frequency synthesis mode, fully utilizes the advantages of direct analog synthesis low phase noise and the advantages of digital phase locking technology low spurious and simple structure, obtains the stepped frequency source with ultralow phase noise and low spurious, and solves the requirements of users on the stepped frequency source with ultralow phase noise and low spurious; the whole structure is simple, the noise is low, and the stray is low.
Description
Technical Field
The utility model relates to a radio frequency microwave technical field specifically is a chain structure of ultralow phase noise and low stray step-by-step frequency source.
Background
With the development of radar, aerospace and test instruments and meters, the performance requirements of internal electronic systems on frequency synthesizers are higher and higher. Among other things, the need for a frequency synthesizer with low phase noise and low spurs is increasing. However, the output local oscillation frequency is a stepping frequency hopping source, and the existing frequency synthesizer based on the Sigma-Delta modulator (SDM) structure has the defects of poor phase noise, large stray and the like, so that the requirements cannot be met; based on this, a link structure of ultra-low phase noise and low spurious step frequency source is proposed.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a link structure of ultralow phase noise and low stray step-by-step frequency source has simple structure, and the low noise, low stray advantage has solved phase noise difference among the prior art, and is stray big problem.
In order to achieve the above object, the utility model provides a following technical scheme: a link structure of an ultra-low phase noise and low stray stepping frequency source comprises a crystal oscillator, a first power divider, a fractional frequency multiplier, a high-speed phase discriminator, a loop filter, a voltage-controlled oscillator, a second power divider, a loop radio frequency amplifier, a mixer, a low-pass filter, a comb spectrum frequency multiplier and a band-pass filter, wherein the output end of the crystal oscillator is connected with the input end of the first power divider, the output end of the first power divider is connected with two output lines, one output line is connected with the input end of the fractional frequency multiplier, and the other output line is connected with the input end of the comb spectrum frequency multiplier; the output end of the decimal frequency multiplier is connected with the input end of the high-speed phase discriminator, the output end of the high-speed phase discriminator is connected with the input end of the loop filter, the output end of the loop filter is connected with the input end of the voltage-controlled oscillator, the output end of the voltage-controlled oscillator is connected with the input end of the second power divider, the output end of the second power divider is connected with two output lines, one output line is connected with a signal output, the other output line is connected with the input end of the loop radio-frequency amplifier, and the output end of the loop radio-frequency amplifier is connected with the input end; the output end of the comb spectrum frequency multiplier is connected to the input end of the band-pass filter, and the output end of the band-pass filter is connected to the input end of the mixer; the output end of the frequency mixer is connected to the input end of the low-pass filter, and the output end of the low-pass filter is connected to the input end of the high-speed phase discriminator.
Preferably, the fractional frequency multiplier adopts an integrated PLL and VCO frequency synthesizer in hardware and configures the register.
Preferably, the frequency division ratio in the high-speed phase detector ring is 1.
Preferably, the band pass filter produces a 7.6G interpolated local oscillator.
Preferably, the two paths of signals output by the first power divider are a 5XX-7XX MHz stepping signal and an excitation signal respectively, the 5XX-7XX MHz stepping signal is transmitted to the fractional frequency multiplier, and the excitation signal is transmitted to the comb spectrum frequency multiplier.
Compared with the prior art, the beneficial effects of the utility model are as follows:
the link structure of the ultralow phase noise and low spurious stepped frequency source adopts a mixed frequency synthesis mode, fully utilizes the advantages of direct analog synthesis low phase noise and the advantages of digital phase locking technology low spurious and simple structure, obtains the ultralow phase noise and low spurious stepped frequency source, solves the requirements of users on the ultralow phase noise and low spurious stepped frequency source, can provide local oscillation signals for a radar receiving system and an up-down frequency conversion module, and can also provide a high-quality clock for high-speed AD/DA; the whole structure is simple, the noise is low, and the stray is low.
Drawings
Fig. 1 is a schematic diagram of the ultra-low phase noise and low stray step frequency source of the present invention.
In the figure: 1. a crystal oscillator; 2. a first power divider; 3. a fractional frequency multiplier; 4. a high-speed phase discriminator; 5. a loop filter; 6. a voltage controlled oscillator; 7. a second power divider; 8. a loop back radio frequency amplifier; 9. a mixer; 10. a low-pass filter; 11. a comb spectrum frequency multiplier; 12. a band pass filter.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1, a link structure of an ultra-low phase noise and low spurious stepped frequency source includes a crystal oscillator 1, a first power divider 2, a fractional frequency multiplier 3, a high-speed phase detector 4, a loop filter 5, a voltage controlled oscillator 6, a second power divider 7, a loop rf amplifier 8, a mixer 9, a low-pass filter 10, a comb spectrum frequency multiplier 11, and a band-pass filter 12, wherein an output terminal of the crystal oscillator 1 is connected to an input terminal of the first power divider 2, two output lines are connected to an output terminal of the first power divider 2, one output line is connected to an input terminal of the fractional frequency multiplier 3, the other output line is connected to an input terminal of the comb spectrum frequency multiplier 11, the fractional frequency multiplier 3 employs an integrated PLL and VCO integrated device in hardware, and a register is configured, the output signals of the first power divider 2 are a stepped signal and an excitation signal of 5XX-7XXMHz, the stepped signal of 5XX-7XXMHz is transmitted to the fractional frequency multiplier 3, the excitation signal is transmitted to a comb spectrum frequency multiplier 11; the output end of the decimal frequency multiplier 3 is connected with the input end of a high-speed phase discriminator 4, the intra-loop frequency dividing ratio of the high-speed phase discriminator 4 is 1, the output end of the high-speed phase discriminator 4 is connected with the input end of a loop filter 5, the output end of the loop filter 5 is connected with the input end of a voltage-controlled oscillator 6, the output end of the voltage-controlled oscillator 6 is connected with the input end of a second power divider 7, the output end of the second power divider 7 is connected with two output lines, one output line is connected with signal output, the other output line is connected with the input end of a loop radio-frequency amplifier 8, and the output end of the loop radio-frequency amplifier; the output end of the comb spectrum frequency multiplier 11 is connected to the input end of the band-pass filter 12, the band-pass filter 12 generates a 7.6G interpolation local oscillator, and the output end of the band-pass filter 12 is connected to the input end of the mixer 9; the output end of the mixer 9 is connected to the input end of the low-pass filter 10, and the output end of the low-pass filter 10 is connected to the input end of the high-speed phase detector 4.
The link structure of the ultralow phase noise and low stray stepping frequency source has the following working principle: the crystal oscillator 1 generates a reference signal, the reference signal is transmitted to a first power divider 2, the first power divider 2 divides the signal into two paths, one path is provided for a decimal frequency multiplier 3, a step reference is generated through the decimal frequency multiplier 3, the decimal frequency multiplier 3 adopts an integrated PLL and VCO frequency synthesizer on hardware, a register is configured, an output step signal which is in decimal frequency multiplication relation with an input signal is generated, the range of the step signal is between 5XX and 7XXMHz, the step signal is used as a reference step signal of an interpolation mixing phase-locked loop and provides the step reference for a high-speed phase discriminator 4, the noise bottom of the high-speed phase discriminator 4 is very low, meanwhile, the phase discrimination frequency is very high, the frequency dividing ratio in the loop is 1, and the phase noise of the high-speed phase discriminator 4 is reduced to the maximum extent; meanwhile, the other path outputs an excitation signal to the comb spectrum frequency multiplier 11, the comb spectrum frequency multiplier 11 generates a comb spectrum signal, the noise bottom of the high-speed phase discriminator 4 is very low, the phase discrimination frequency is very high, the intra-loop frequency division ratio is 1, the phase noise of the high-speed phase discriminator 4 is reduced to the maximum extent, a 7.6G interpolation local oscillator is generated through the band-pass filter 12, the interpolation local oscillator is generated through a direct analog synthesis mode, the phase noise is basically 20lgN of a reference constant-temperature crystal oscillator signal, and the phase noise of the interpolation local oscillator is reduced to the maximum extent; the high-speed phase discriminator 4 outputs step signals, the step signals are transmitted to a second power divider 7 after passing through a loop filter 5 and a voltage-controlled oscillator 6, one path of signals outputs 81XX-83XX MHz signals, the other path of signals is amplified through a loop radio frequency amplifier 8, the signals are mixed with an interpolated local oscillator in a mixer 9, low-frequency signals are generated through a low-pass filter 10 and enter the high-speed phase discriminator 4, the low-frequency signals and 5XX-7XX MHz step references generated by a decimal frequency multiplier 3 are subjected to phase discrimination comparison, the high-speed phase discriminator 4 outputs low-pass error signals after comparison, the low-frequency direct current signals enter the loop filter 5 to be filtered out to tune the voltage-controlled oscillator 6, a loop is formed, and. Because the intra-ring frequency division ratio of the high-speed phase detector 4 is 1, the phase discrimination frequency is high, the phase noise of the high-speed phase detector 4 is low, and meanwhile, the phase noise of the interpolated local oscillator is generated in a direct analog synthesis mode, so that the finally output phase noise is very low, and meanwhile, through elaborate link design, the spurious index is very low, and finally, the step signal of 81XX-83XX MHz is synthesized.
In summary, the following steps: the link structure of the ultralow phase noise and low spurious stepped frequency source adopts a mixed frequency synthesis mode, fully utilizes the advantages of direct analog synthesis low phase noise and the advantages of digital phase locking technology low spurious and simple structure, obtains the ultralow phase noise and low spurious stepped frequency source, solves the requirements of users on the ultralow phase noise and low spurious stepped frequency source, can provide local oscillation signals for a radar receiving system and an up-down frequency conversion module, and can also provide a high-quality clock for high-speed AD/DA; the whole structure is simple, the noise is low, and the stray is low.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (4)
1. The utility model provides a link structure of ultralow phase noise and low spurious step frequency source, includes crystal oscillator (1), first merit and divides ware (2), decimal frequency multiplier (3), high-speed phase detector (4), loop filter (5), voltage controlled oscillator (6), second merit divide ware (7), return ring radio frequency amplifier (8), mixer (9), low pass filter (10), comb spectrum frequency multiplier (11) and band pass filter (12), its characterized in that: the output end of the crystal oscillator (1) is connected with the input end of the first power divider (2), the output end of the first power divider (2) is connected with two output lines, one output line is connected with the input end of the decimal frequency multiplier (3), and the other output line is connected with the input end of the comb spectrum frequency multiplier (11); the output end of the decimal frequency multiplier (3) is connected with the input end of the high-speed phase discriminator (4), the output end of the high-speed phase discriminator (4) is connected with the input end of the loop filter (5), the output end of the loop filter (5) is connected with the input end of the voltage-controlled oscillator (6), the output end of the voltage-controlled oscillator (6) is connected with the input end of the second power divider (7), the output end of the second power divider (7) is connected with two output lines, one output line is connected with a signal output, the other output line is connected with the input end of the loop radio frequency amplifier (8), and the output end of the loop radio frequency amplifier (8) is connected with the input end of the mixer (9); the output end of the comb spectrum frequency multiplier (11) is connected to the input end of a band-pass filter (12), and the output end of the band-pass filter (12) is connected to the input end of a mixer (9); the output end of the mixer (9) is connected to the input end of the low-pass filter (10), and the output end of the low-pass filter (10) is connected to the input end of the high-speed phase detector (4).
2. The link structure for an ultra-low phase noise and low spurious stepped frequency source of claim 1, wherein: the decimal frequency multiplier (3) adopts an integrated PLL and VCO frequency synthesizer on hardware and is provided with a register.
3. The link structure for an ultra-low phase noise and low spurious stepped frequency source of claim 1, wherein: and the intra-loop frequency division ratio of the high-speed phase detector (4) is 1.
4. The link structure for an ultra-low phase noise and low spurious stepped frequency source of claim 1, wherein: the band pass filter (12) produces a 7.6G interpolated local oscillator.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113726334A (en) * | 2021-07-20 | 2021-11-30 | 江苏华讯电子技术有限公司 | S-band low-phase-noise low-spurious fine-stepping frequency source component and using method |
| CN116170009A (en) * | 2023-04-21 | 2023-05-26 | 成都世源频控技术股份有限公司 | Broadband, low phase noise and fine stepping frequency source generating circuit |
| CN117081583A (en) * | 2023-10-17 | 2023-11-17 | 成都世源频控技术股份有限公司 | Frequency source for improving phase noise |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113726334A (en) * | 2021-07-20 | 2021-11-30 | 江苏华讯电子技术有限公司 | S-band low-phase-noise low-spurious fine-stepping frequency source component and using method |
| CN113726334B (en) * | 2021-07-20 | 2024-03-08 | 江苏华讯电子技术有限公司 | S-band low-phase-noise low-stray fine stepping frequency source assembly and use method |
| CN116170009A (en) * | 2023-04-21 | 2023-05-26 | 成都世源频控技术股份有限公司 | Broadband, low phase noise and fine stepping frequency source generating circuit |
| CN116170009B (en) * | 2023-04-21 | 2023-07-25 | 成都世源频控技术股份有限公司 | Broadband, low phase noise and fine stepping frequency source generating circuit |
| CN117081583A (en) * | 2023-10-17 | 2023-11-17 | 成都世源频控技术股份有限公司 | Frequency source for improving phase noise |
| CN117081583B (en) * | 2023-10-17 | 2024-02-13 | 成都世源频控技术股份有限公司 | Frequency source for improving phase noise |
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Effective date of registration: 20210709 Address after: 226400 Building 5, 99 Huanghe Road, Rudong Economic Development Zone, Nantong City, Jiangsu Province Patentee after: JIANGSU HUAXUN ELECTRONIC TECHNOLOGY Co.,Ltd. Address before: 211100 No.9, mozhou East Road, Jiangning District, Nanjing City, Jiangsu Province (Jiangning Development Zone) Patentee before: Nanjing Hengbo Technology Co.,Ltd. |