Classifications

• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
  • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
  • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
  • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
  • B41J2/01—Ink jet
  • B41J2/135—Nozzles
  • B41J2/14—Structure thereof only for on-demand ink jet heads
  • B41J2/14016—Structure of bubble jet print heads
  • B41J2/14072—Electrical connections, e.g. details on electrodes, connecting the chip to the outside...
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L23/00—Details of semiconductor or other solid state devices
  • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
  • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L23/5226—Via connections in a multilevel interconnection structure
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L23/00—Details of semiconductor or other solid state devices
  • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
  • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L23/528—Geometry or layout of the interconnection structure
  • H01L23/5286—Arrangements of power or ground buses
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/02—Bonding areas ; Manufacturing methods related thereto
  • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
  • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas

Landscapes

• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Geometry (AREA)
• Manufacturing & Machinery (AREA)
• Particle Formation And Scattering Control In Inkjet Printers (AREA)
• Multi-Conductor Connections (AREA)

Applications Claiming Priority (2)

Publications (1)

Family

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Family Applications (1)

Country Status (11)

Families Citing this family (2)

Family Cites Families (20)

• 2014
  • 2014-08-18 CN CN201480081283.5A patent/CN106663656B/zh active Active
  • 2014-08-18 PL PL14900211T patent/PL3183746T3/pl unknown
  • 2014-08-18 BR BR112017002973-1A patent/BR112017002973B1/pt active IP Right Grant
  • 2014-08-18 US US15/502,588 patent/US9975335B2/en active Active
  • 2014-08-18 RU RU2017104318A patent/RU2652527C1/ru active
  • 2014-08-18 JP JP2017506902A patent/JP6346374B2/ja active Active
  • 2014-08-18 ES ES14900211T patent/ES2833121T3/es active Active
  • 2014-08-18 KR KR1020177004286A patent/KR101965518B1/ko active IP Right Grant
  • 2014-08-18 EP EP14900211.5A patent/EP3183746B1/en active Active
  • 2014-08-18 WO PCT/US2014/051512 patent/WO2016028261A1/en active Application Filing
• 2015
  • 2015-08-14 TW TW104126576A patent/TWI561396B/zh active
• 2018
  • 2018-03-02 US US15/910,248 patent/US10384449B2/en active Active

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