PL109105B1 - Homogenous matrix structure cell - Google Patents
Homogenous matrix structure cell Download PDFInfo
- Publication number
- PL109105B1 PL109105B1 PL20013977A PL20013977A PL109105B1 PL 109105 B1 PL109105 B1 PL 109105B1 PL 20013977 A PL20013977 A PL 20013977A PL 20013977 A PL20013977 A PL 20013977A PL 109105 B1 PL109105 B1 PL 109105B1
- Authority
- PL
- Poland
- Prior art keywords
- information
- cell
- inputs
- links
- logical
- Prior art date
Links
- 239000011159 matrix material Substances 0.000 title claims description 25
- 238000000034 method Methods 0.000 claims description 2
- 238000010276 construction Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Read Only Memory (AREA)
- Logic Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SU762398612A SU624295A1 (ru) | 1976-08-17 | 1976-08-17 | Ячейка пам ти дл матричной однородной структуры |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| PL200139A1 PL200139A1 (pl) | 1978-04-24 |
| PL109105B1 true PL109105B1 (en) | 1980-05-31 |
Family
ID=20674913
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PL20013977A PL109105B1 (en) | 1976-08-17 | 1977-08-09 | Homogenous matrix structure cell |
Country Status (10)
| Country | Link |
|---|---|
| JP (1) | JPS5341139A (enExample) |
| BG (1) | BG30596A1 (enExample) |
| DD (1) | DD132688A1 (enExample) |
| DE (1) | DE2736061C2 (enExample) |
| FR (1) | FR2362471A1 (enExample) |
| GB (1) | GB1545338A (enExample) |
| IN (1) | IN147561B (enExample) |
| PL (1) | PL109105B1 (enExample) |
| RO (1) | RO73483A (enExample) |
| SU (1) | SU624295A1 (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60226090A (ja) * | 1984-04-25 | 1985-11-11 | Nec Corp | スタテイツクランダムアクセスメモリ回路 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3638204A (en) * | 1969-12-19 | 1972-01-25 | Ibm | Semiconductive cell for a storage having a plurality of simultaneously accessible locations |
| US3675218A (en) * | 1970-01-15 | 1972-07-04 | Ibm | Independent read-write monolithic memory array |
-
1976
- 1976-08-17 SU SU762398612A patent/SU624295A1/ru active
-
1977
- 1977-08-04 IN IN1197/CAL/77A patent/IN147561B/en unknown
- 1977-08-09 PL PL20013977A patent/PL109105B1/pl unknown
- 1977-08-10 DE DE19772736061 patent/DE2736061C2/de not_active Expired
- 1977-08-10 JP JP9518977A patent/JPS5341139A/ja active Pending
- 1977-08-11 DD DD20053677A patent/DD132688A1/xx unknown
- 1977-08-15 BG BG7737170A patent/BG30596A1/xx unknown
- 1977-08-16 GB GB3440677A patent/GB1545338A/en not_active Expired
- 1977-08-16 RO RO7791379A patent/RO73483A/ro unknown
- 1977-08-16 FR FR7725004A patent/FR2362471A1/fr active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| IN147561B (enExample) | 1980-04-12 |
| BG30596A1 (en) | 1981-07-15 |
| DE2736061C2 (de) | 1982-05-06 |
| DE2736061A1 (de) | 1978-02-23 |
| SU624295A1 (ru) | 1978-09-15 |
| FR2362471B1 (enExample) | 1980-07-11 |
| JPS5341139A (en) | 1978-04-14 |
| DD132688A1 (de) | 1978-10-18 |
| FR2362471A1 (fr) | 1978-03-17 |
| PL200139A1 (pl) | 1978-04-24 |
| RO73483A (ro) | 1981-11-04 |
| GB1545338A (en) | 1979-05-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE3854474T2 (de) | Vorrichtung und verfahren zur übertragung von nachrichtenpaketen. | |
| US4467422A (en) | Array processor | |
| US3979728A (en) | Array processors | |
| US3713096A (en) | Shift register interconnection of data processing system | |
| JPS63253725A (ja) | プログラマブル集積回路論理アレイデバイス | |
| JPH05507394A (ja) | 入出力パッドでプログラマブル・インバータを有するプログラマブル論理装置 | |
| US4383304A (en) | Programmable bit shift circuit | |
| JPS61288518A (ja) | 電気的にプログラム可能な論理アレ− | |
| DE3882990T2 (de) | Verfahren und gerät zur simulation von m-dimensionalen verbindungsnetzwerken in einem n-dimensionalen netzwerk, worin m kleiner ist als n. | |
| CA1037157A (en) | Two-dimensional radiant energy array computers and computing devices | |
| US5001626A (en) | Vector processor | |
| JPS59221752A (ja) | エラ−検査・診断装置 | |
| JPS6416045A (en) | Exchange network control method and circuit arrangement | |
| PL109105B1 (en) | Homogenous matrix structure cell | |
| US3991276A (en) | Time-space-time division switching network | |
| US20010025238A1 (en) | Emulation system and method | |
| Lau | Topological semigroups with invariant means in the convex hull of multiplicative means | |
| EP0281426A2 (en) | Electronic circuit device for diagnosing status-holding circuits by scanning | |
| JPH0419569B2 (enExample) | ||
| Turner | Terabit Burst Switching Progress Report (6/98-9/98) | |
| EP0203728B1 (en) | Graphics picture element data byte processor | |
| JP4151241B2 (ja) | 半導体試験装置のピンレジスタ回路 | |
| JPS62107596A (ja) | パルスチエツク回路 | |
| JPS61114693A (ja) | 電気機械的空間スイツチングネツトワーク用装置 | |
| Slimane-kadi et al. | Interconnection networks with fault-tolerance properties |