PH12020500588A1 - Transmission method and reception device - Google Patents

Transmission method and reception device

Info

Publication number
PH12020500588A1
PH12020500588A1 PH12020500588A PH12020500588A PH12020500588A1 PH 12020500588 A1 PH12020500588 A1 PH 12020500588A1 PH 12020500588 A PH12020500588 A PH 12020500588A PH 12020500588 A PH12020500588 A PH 12020500588A PH 12020500588 A1 PH12020500588 A1 PH 12020500588A1
Authority
PH
Philippines
Prior art keywords
transmission method
ldpc code
bits
groupwise
reception device
Prior art date
Application number
PH12020500588A
Other languages
English (en)
Inventor
Yuji Shinohara
Makiko Yamamoto
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of PH12020500588A1 publication Critical patent/PH12020500588A1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/033—Theoretical methods to calculate these checking codes
    • H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615—Use of computational or mathematical techniques
    • H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Algebra (AREA)
  • Computing Systems (AREA)
  • Multimedia (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
PH12020500588A 2018-01-18 2020-07-09 Transmission method and reception device PH12020500588A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018006026A JP7077627B2 (ja) 2018-01-18 2018-01-18 送信装置、送信方法、受信装置、及び、受信方法
PCT/JP2019/000126 WO2019142683A1 (ja) 2018-01-18 2019-01-08 送信方法及び受信装置

Publications (1)

Publication Number Publication Date
PH12020500588A1 true PH12020500588A1 (en) 2021-06-14

Family

ID=67301497

Family Applications (1)

Application Number Title Priority Date Filing Date
PH12020500588A PH12020500588A1 (en) 2018-01-18 2020-07-09 Transmission method and reception device

Country Status (5)

Country Link
US (1) US11159181B2 (ja)
JP (1) JP7077627B2 (ja)
PH (1) PH12020500588A1 (ja)
TW (1) TWI683546B (ja)
WO (1) WO2019142683A1 (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6930373B2 (ja) * 2017-10-31 2021-09-01 ソニーグループ株式会社 送信装置及び送信方法
JP6930374B2 (ja) * 2017-10-31 2021-09-01 ソニーグループ株式会社 送信装置及び送信方法
JP7119431B2 (ja) * 2018-01-18 2022-08-17 ソニーグループ株式会社 送信装置、送信方法、受信装置、及び、受信方法

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101350625B (zh) 2007-07-18 2011-08-31 北京泰美世纪科技有限公司 一种高效通用的qc-ldpc码译码器及其译码方法
TWI497920B (zh) * 2007-11-26 2015-08-21 Sony Corp Data processing device and data processing method
US8782489B2 (en) * 2010-02-18 2014-07-15 Hughes Network Systems, Llc Method and system for providing Low Density Parity Check (LDPC) encoding and decoding
KR101670511B1 (ko) * 2010-05-07 2016-10-28 삼성전자주식회사 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널 부호/복호 방법 및 장치
EP2955855A4 (en) * 2013-02-08 2016-08-17 Sony Corp DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
US9577678B2 (en) * 2014-01-29 2017-02-21 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 7/15 and quadrature phase shift keying, and bit interleaving method using same
JP2015156530A (ja) 2014-02-19 2015-08-27 ソニー株式会社 データ処理装置、及び、データ処理方法
US10425110B2 (en) 2014-02-19 2019-09-24 Samsung Electronics Co., Ltd. Transmitting apparatus and interleaving method thereof
US9602136B2 (en) 2014-03-06 2017-03-21 Electronics And Telecommunications Research Institute Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 256-symbol mapping, and bit interleaving method using same
WO2015182102A1 (ja) 2014-05-30 2015-12-03 パナソニックＩｐマネジメント株式会社 送信装置、受信装置、送信方法および受信方法
JP6628124B2 (ja) 2014-05-30 2020-01-08 パナソニックＩｐマネジメント株式会社 送信装置、受信装置、送信方法および受信方法
KR102178262B1 (ko) * 2014-07-08 2020-11-12 삼성전자주식회사 패리티 검사 행렬 생성 방법, 그를 이용한 부호화 장치, 부호화 방법, 복호화 장치 및 복호화 방법
KR102329573B1 (ko) * 2014-12-10 2021-11-22 삼성전자주식회사 송신 장치 및 그의 신호 처리 방법
KR102240745B1 (ko) 2015-01-20 2021-04-16 한국전자통신연구원 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 qpsk를 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
KR102287635B1 (ko) * 2015-02-17 2021-08-10 한국전자통신연구원 길이가 16200이며, 부호율이 3/15인 ldpc 부호어 및 256-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법
CA3214526A1 (en) * 2015-03-02 2016-09-09 Samsung Electronic Co., Ltd. Transmitter and parity permutation method thereof
CN111917518B (zh) * 2015-03-02 2023-04-14 三星电子株式会社 发送方法
US9787326B2 (en) * 2015-05-19 2017-10-10 Samsung Electronics Co., Ltd. Method and apparatus for encoding and decoding low density parity check codes
JP7069542B2 (ja) 2016-12-16 2022-05-18 ソニーグループ株式会社 送信装置、及び、送信方法
JP7049095B2 (ja) 2017-06-29 2022-04-06 日本放送協会 符号化器、復号器、送信装置及び受信装置
JP7077628B2 (ja) * 2018-01-18 2022-05-31 ソニーグループ株式会社 送信装置、送信方法、受信装置、及び、受信方法
JP7119431B2 (ja) * 2018-01-18 2022-08-17 ソニーグループ株式会社 送信装置、送信方法、受信装置、及び、受信方法

Also Published As

Publication number Publication date
US20200343915A1 (en) 2020-10-29
JP7077627B2 (ja) 2022-05-31
US11159181B2 (en) 2021-10-26
WO2019142683A1 (ja) 2019-07-25
JP2019125949A (ja) 2019-07-25
TW201933793A (zh) 2019-08-16
TWI683546B (zh) 2020-01-21

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