NO995665D0 - Kretsmönsterlegging for elektronikkindustrien - Google Patents

Kretsmönsterlegging for elektronikkindustrien

Info

Publication number
NO995665D0
NO995665D0 NO995665A NO995665A NO995665D0 NO 995665 D0 NO995665 D0 NO 995665D0 NO 995665 A NO995665 A NO 995665A NO 995665 A NO995665 A NO 995665A NO 995665 D0 NO995665 D0 NO 995665D0
Authority
NO
Norway
Prior art keywords
circuit design
electronics industry
electronics
industry
design
Prior art date
Application number
NO995665A
Other languages
English (en)
Other versions
NO995665L (no
Inventor
Yuji Toyota
Yoshihiro Koshido
Masayuki Hasegawa
Original Assignee
Murata Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co filed Critical Murata Manufacturing Co
Publication of NO995665D0 publication Critical patent/NO995665D0/no
Publication of NO995665L publication Critical patent/NO995665L/no

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/046Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
    • H05K3/048Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer using a lift-off resist pattern or a release layer pattern
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0548Masks
    • H05K2203/056Using an artwork, i.e. a photomask for exposing photosensitive layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0073Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
    • H05K3/0082Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the exposure method of radiation-sensitive masks
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/947Subphotolithographic processing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/949Energy beam treating radiation resist on semiconductor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/951Lift-off
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/952Utilizing antireflective layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Materials For Photolithography (AREA)
NO995665A 1998-11-19 1999-11-18 Kretsmønsterlegging for elektronikkindustrien NO995665L (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32989598A JP2000156377A (ja) 1998-11-19 1998-11-19 レジストパターン及びその形成方法並びに配線パターンの形成方法

Publications (2)

Publication Number Publication Date
NO995665D0 true NO995665D0 (no) 1999-11-18
NO995665L NO995665L (no) 2000-05-22

Family

ID=18226465

Family Applications (1)

Application Number Title Priority Date Filing Date
NO995665A NO995665L (no) 1998-11-19 1999-11-18 Kretsmønsterlegging for elektronikkindustrien

Country Status (7)

Country Link
US (1) US6340635B1 (no)
EP (1) EP1005066A3 (no)
JP (1) JP2000156377A (no)
KR (1) KR100432794B1 (no)
CN (1) CN1254944A (no)
CA (1) CA2288458A1 (no)
NO (1) NO995665L (no)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001279494A (ja) * 2000-03-31 2001-10-10 Tdk Corp 導電体の形成方法、並びに半導体素子及び磁気ヘッドの製造方法
US6879400B2 (en) * 2000-12-11 2005-04-12 International Business Machines Corporation Single tone process window metrology target and method for lithographic processing
JP4084712B2 (ja) * 2003-06-23 2008-04-30 松下電器産業株式会社 パターン形成方法
EP1716450A4 (en) 2004-02-11 2007-06-27 Ibm USE OF MIXED BASES TO IMPROVE STRUCTURED RESISTANCE PROFILES ON CHROMIUM OR SENSITIVE SUBSTRATES
CN101354534B (zh) * 2007-07-27 2011-07-06 中芯国际集成电路制造(上海)有限公司 光刻胶的涂布方法及光刻图形的形成方法
KR101498664B1 (ko) * 2010-05-04 2015-03-05 주식회사 엘지화학 네가티브 포토레지스트 조성물 및 소자의 패터닝 방법
JP2011164628A (ja) * 2011-03-02 2011-08-25 Semiconductor Energy Lab Co Ltd 電気光学装置の作製方法
US9612526B2 (en) 2014-08-28 2017-04-04 Taiwan Semiconductor Manufacturing Co., Ltd. Photomask and method for fabricating integrated circuit
US10108092B2 (en) * 2015-01-15 2018-10-23 Korea Research Institute Of Standards And Science Photolithography method
CN110737170A (zh) * 2019-03-07 2020-01-31 南方科技大学 纳米结构的制作方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3631772A (en) * 1969-07-09 1972-01-04 Bell Telephone Labor Inc Method and apparatus for characterizing photoresist
US4224361A (en) 1978-09-05 1980-09-23 International Business Machines Corporation High temperature lift-off technique
JPS5676531A (en) 1979-11-28 1981-06-24 Fujitsu Ltd Manufacture of semiconductor device
US5486449A (en) * 1989-02-07 1996-01-23 Rohm Co., Ltd. Photomask, photoresist and photolithography for a monolithic IC
KR920015482A (ko) 1991-01-30 1992-08-27 김광호 광리소그라피의 한계해상도 이하의 미세패턴 형성방법
JP2842737B2 (ja) * 1991-08-08 1999-01-06 富士通株式会社 電子ビーム露光方法
US5403685A (en) * 1992-09-29 1995-04-04 Sharp Kabushiki Kaisha Lithographic process for producing small mask apertures and products thereof
JP2837063B2 (ja) * 1993-06-04 1998-12-14 シャープ株式会社 レジストパターンの形成方法
JP2701765B2 (ja) * 1994-12-28 1998-01-21 日本電気株式会社 半導体装置の製造方法
JP3197484B2 (ja) * 1995-05-31 2001-08-13 シャープ株式会社 フォトマスク及びその製造方法
US5635285A (en) * 1995-06-07 1997-06-03 International Business Machines Corporation Method and system for controlling the relative size of images formed in light-sensitive media
US5821013A (en) * 1996-12-13 1998-10-13 Symbios, Inc. Variable step height control of lithographic patterning through transmitted light intensity variation
US5928815A (en) * 1997-11-14 1999-07-27 Martin; Joseph Proximity masking device for near-field optical lithography

Also Published As

Publication number Publication date
US6340635B1 (en) 2002-01-22
CN1254944A (zh) 2000-05-31
CA2288458A1 (en) 2000-05-19
EP1005066A3 (en) 2001-04-04
KR20000047647A (ko) 2000-07-25
KR100432794B1 (ko) 2004-05-24
NO995665L (no) 2000-05-22
EP1005066A2 (en) 2000-05-31
JP2000156377A (ja) 2000-06-06

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Legal Events

Date Code Title Description
FC2A Withdrawal, rejection or dismissal of laid open patent application