NL8120397A - - Google Patents

Download PDF

Info

Publication number
NL8120397A
NL8120397A NL8120397A NL8120397A NL8120397A NL 8120397 A NL8120397 A NL 8120397A NL 8120397 A NL8120397 A NL 8120397A NL 8120397 A NL8120397 A NL 8120397A NL 8120397 A NL8120397 A NL 8120397A
Authority
NL
Netherlands
Prior art keywords
interrupt
signal
information
transfer
processor
Prior art date
Application number
NL8120397A
Other languages
English (en)
Dutch (nl)
Original Assignee
Digital Equipment Corporation Te Maynard, Massachusetts, Ver.St.V.Am.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corporation Te Maynard, Massachusetts, Ver.St.V.Am. filed Critical Digital Equipment Corporation Te Maynard, Massachusetts, Ver.St.V.Am.
Publication of NL8120397A publication Critical patent/NL8120397A/nl

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
NL8120397A 1980-10-20 1981-10-20 NL8120397A (sv)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US06/198,528 US4381542A (en) 1980-10-20 1980-10-20 System for interrupt arbitration
US19852880 1980-10-20
US8101405 1981-10-20
PCT/US1981/001405 WO1982001430A1 (en) 1980-10-20 1981-10-20 Improved system for interrupt arbitration

Publications (1)

Publication Number Publication Date
NL8120397A true NL8120397A (sv) 1982-08-02

Family

ID=22733757

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8120397A NL8120397A (sv) 1980-10-20 1981-10-20

Country Status (14)

Country Link
US (1) US4381542A (sv)
EP (1) EP0062667B1 (sv)
JP (1) JPS57501700A (sv)
AR (1) AR228463A1 (sv)
AU (1) AU538251B2 (sv)
CA (1) CA1171182A (sv)
DE (1) DE3152435T1 (sv)
ES (1) ES506339A0 (sv)
GB (3) GB2147719B (sv)
IT (1) IT1144899B (sv)
MX (1) MX151066A (sv)
NL (1) NL8120397A (sv)
SE (2) SE447171B (sv)
WO (1) WO1982001430A1 (sv)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4602327A (en) * 1983-07-28 1986-07-22 Motorola, Inc. Bus master capable of relinquishing bus on request and retrying bus cycle
US4769768A (en) * 1983-09-22 1988-09-06 Digital Equipment Corporation Method and apparatus for requesting service of interrupts by selected number of processors
US4661905A (en) * 1983-09-22 1987-04-28 Digital Equipment Corporation Bus-control mechanism
US4763249A (en) * 1983-09-22 1988-08-09 Digital Equipment Corporation Bus device for use in a computer system having a synchronous bus
AU562975B2 (en) * 1983-09-22 1987-06-25 Digital Equipment Corporation Message oriented interrupt mechanism for multiprocessor systems
US4628449A (en) * 1983-11-14 1986-12-09 Tandem Computers Incorporated Vector interrupt system and method
US4641266A (en) * 1983-11-28 1987-02-03 At&T Bell Laboratories Access-arbitration scheme
US4648029A (en) * 1984-08-27 1987-03-03 International Business Machines Corporation Multiplexed interrupt/DMA request arbitration apparatus and method
US4757446A (en) * 1986-04-01 1988-07-12 Wang Laboratories, Inc. High-speed link for connecting peer systems
US5077662A (en) * 1986-04-11 1991-12-31 Ampex Corporation Microprocessor control system having expanded interrupt capabilities
US4942517A (en) * 1987-10-08 1990-07-17 Eastman Kodak Company Enhanced input/output architecture for toroidally-connected distributed-memory parallel computers
US4905137A (en) * 1987-12-18 1990-02-27 North American Philips Corporation Signetics Division Data bus control of ROM units in information processing system
US5261057A (en) * 1988-06-30 1993-11-09 Wang Laboratories, Inc. I/O bus to system interface
DE58908227D1 (de) * 1988-07-07 1994-09-29 Siemens Ag Schaltungsanordnung zur Prioritätsauswahl.
US5081578A (en) * 1989-11-03 1992-01-14 Ncr Corporation Arbitration apparatus for a parallel bus
US5212796A (en) * 1990-01-02 1993-05-18 Motorola, Inc. System with modules using priority numbers related to interrupt vectors for bit-serial-arbitration on independent arbitration bus while CPU executing instructions
US5138709A (en) * 1990-04-11 1992-08-11 Motorola, Inc. Spurious interrupt monitor
US5261105A (en) * 1990-05-04 1993-11-09 Thinking Machines Corporation System for transferring blocks of data among diverse units having cycle identifier signals to identify different phase of data transfer operations
US5276887A (en) * 1991-06-06 1994-01-04 Commodore Electronics Limited Bus arbitration system for granting bus access to devices following two-wire bus arbitration protocol and devices following three-wire bus arbitration protocol
US5590380A (en) * 1992-04-22 1996-12-31 Kabushiki Kaisha Toshiba Multiprocessor system with processor arbitration and priority level setting by the selected processor
EP0576764A1 (en) * 1992-06-30 1994-01-05 International Business Machines Corporation Method and apparatus for managing the access to a resource by several users in a data processing system
US5758157A (en) * 1992-12-31 1998-05-26 International Business Machines Corporation Method and system for providing service processor capability in a data processing by transmitting service processor requests between processing complexes
US5734844A (en) * 1993-10-08 1998-03-31 Cyrix Corporation Bidirectional single-line handshake with both devices driving the line in the same state for hand-off
US6002877A (en) * 1994-03-23 1999-12-14 Fujitsu Limited Interrupt control method for controlling an interrupt from a peripheral device to a processor
JPH07262023A (ja) * 1994-03-23 1995-10-13 Fujitsu Ltd 割込制御方式
US5848279A (en) * 1996-12-27 1998-12-08 Intel Corporation Mechanism for delivering interrupt messages
US6738845B1 (en) * 1999-11-05 2004-05-18 Analog Devices, Inc. Bus architecture and shared bus arbitration method for a communication device
US7529875B2 (en) * 2003-08-20 2009-05-05 International Business Machines Corporation Assigning interrupts for input/output (I/O) devices among nodes of a non-uniform memory access (NUMA) system
DE102013204443A1 (de) 2013-03-14 2014-10-02 Carl Zeiss Smt Gmbh Optische Baugruppe zur Lichtleitwerterhöhung

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3710324A (en) * 1970-04-01 1973-01-09 Digital Equipment Corp Data processing system
US3815099A (en) * 1970-04-01 1974-06-04 Digital Equipment Corp Data processing system
US3836889A (en) * 1973-03-23 1974-09-17 Digital Equipment Corp Priority interruption circuits for digital computer systems
US3999163A (en) * 1974-01-10 1976-12-21 Digital Equipment Corporation Secondary storage facility for data processing systems
JPS5428260B2 (sv) * 1974-09-02 1979-09-14
JPS52119039A (en) * 1976-03-31 1977-10-06 Hitachi Ltd Input output controlling device
JPS533137A (en) * 1976-06-30 1978-01-12 Toshiba Corp Interruption control system
ES474428A1 (es) * 1977-10-25 1979-04-16 Digital Equipment Corp Un sistema de tratamiento de datos.
GB2076191B (en) * 1978-12-26 1983-06-02 Honeywell Inf Systems Improvements in or relating to terminal systems for data processors
DE3009530A1 (de) * 1979-03-12 1980-09-25 Digital Equipment Corp Datenverarbeitungssystem

Also Published As

Publication number Publication date
AU7726081A (en) 1982-05-11
EP0062667A1 (en) 1982-10-20
GB2095876A (en) 1982-10-06
GB2147719A (en) 1985-05-15
GB8413500D0 (en) 1984-07-04
DE3152435C2 (sv) 1990-02-22
ES8303745A1 (es) 1983-02-01
EP0062667A4 (en) 1984-11-22
JPS57501700A (sv) 1982-09-16
SE8203582L (sv) 1982-06-09
SE8502345D0 (sv) 1985-05-10
GB8410822D0 (en) 1984-06-06
CA1171182A (en) 1984-07-17
AR228463A1 (es) 1983-03-15
DE3152435T1 (de) 1982-11-18
AU538251B2 (en) 1984-08-02
IT1144899B (it) 1986-10-29
US4381542A (en) 1983-04-26
IT8168350A0 (it) 1981-10-19
MX151066A (es) 1984-09-20
GB2095876B (en) 1985-07-17
SE447171B (sv) 1986-10-27
GB2147719B (en) 1985-09-04
SE8502345L (sv) 1985-05-10
ES506339A0 (es) 1983-02-01
SE447172B (sv) 1986-10-27
WO1982001430A1 (en) 1982-04-29
EP0062667B1 (en) 1989-03-15

Similar Documents

Publication Publication Date Title
NL8120397A (sv)
JP2571661B2 (ja) 通信効率を向上する方法及び装置
CA1318037C (en) Data processing system bus architecture
EP0115454B1 (en) Bus for data processing system with fault cycle operation
US4495564A (en) Multi sub-channel adapter with single status/address register
CA1305560C (en) Method and apparatus for interconnecting busses in a multibus computer system
CA2021832C (en) Apparatus and method for improving the communication efficiency between a host processor and peripheral devices connected by an scsi bus
US4236203A (en) System providing multiple fetch bus cycle operation
US5255372A (en) Apparatus for efficiently interconnecing channels of a multiprocessor system multiplexed via channel adapters
WO1986005293A1 (en) Dual function i/o controller
US4611275A (en) Time sharing device for access to a main memory through to a single bus connected between a central computer and a plurality of peripheral computers
JPH06301627A (ja) 直接アクセス記憶装置へのアクセス調整システム及び方法
JPH02503367A (ja) 保留バスを用いて割り込みに応じる装置及び方法
EP0512685B1 (en) Quadrature bus protocol for carrying out transactions in a computer system
US5206936A (en) Apparatus for exchanging channel adapter status among multiple channel adapters
EP0037459B1 (en) Data processing systems and methods of operating such systems to transfer data between the main store and a secondary store
KR920010977B1 (ko) 개선된 성능의 메모리 버스 아키텍쳐(memory bus architecture)
EP0570827A1 (en) System and method for rotational position sensing miss avoidance in direct access storage device
JP2522069B2 (ja) 記録装置
JP3422501B2 (ja) アクセス調停装置
JPS595928B2 (ja) 診断プログラムのロ−デイング処理方式
JPH08314853A (ja) Ｓｃｓｉデバイス接続装置
JPH03228165A (ja) 優先順位判定装置
JPS5850058A (ja) 共通メモリインタフエ−ス回路
JPS6047630B2 (ja) バス制御方式