NL6700993A - - Google Patents

Info

Publication number
NL6700993A
NL6700993A NL6700993A NL6700993A NL6700993A NL 6700993 A NL6700993 A NL 6700993A NL 6700993 A NL6700993 A NL 6700993A NL 6700993 A NL6700993 A NL 6700993A NL 6700993 A NL6700993 A NL 6700993A
Authority
NL
Netherlands
Application number
NL6700993A
Other versions
NL154060B (nl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6700993A publication Critical patent/NL6700993A/xx
Publication of NL154060B publication Critical patent/NL154060B/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/051Etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/928Front and rear surface processing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/977Thinning or removal of substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Recrystallisation Techniques (AREA)
NL676700993A 1966-01-12 1967-01-20 Werkwijze voor het vervaardigen van een geintegreerde halfgeleiderschakeling met elektrische isolatie. NL154060B (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US520245A US3357871A (en) 1966-01-12 1966-01-12 Method for fabricating integrated circuits
US522278A US3419956A (en) 1966-01-12 1966-01-21 Technique for obtaining isolated integrated circuits

Publications (2)

Publication Number Publication Date
NL6700993A true NL6700993A (en:Method) 1967-07-24
NL154060B NL154060B (nl) 1977-07-15

Family

ID=27060085

Family Applications (2)

Application Number Title Priority Date Filing Date
NL676700219A NL154062B (nl) 1966-01-12 1967-01-06 Werkwijze voor het vervaardigen van een geintegreerde halfgeleiderschakeling, alsmede geintegreerde halfgeleiderschakeling, vervaardigd met deze werkwijze.
NL676700993A NL154060B (nl) 1966-01-12 1967-01-20 Werkwijze voor het vervaardigen van een geintegreerde halfgeleiderschakeling met elektrische isolatie.

Family Applications Before (1)

Application Number Title Priority Date Filing Date
NL676700219A NL154062B (nl) 1966-01-12 1967-01-06 Werkwijze voor het vervaardigen van een geintegreerde halfgeleiderschakeling, alsmede geintegreerde halfgeleiderschakeling, vervaardigd met deze werkwijze.

Country Status (8)

Country Link
US (2) US3357871A (en:Method)
BE (2) BE691802A (en:Method)
CH (2) CH451325A (en:Method)
DE (2) DE1589918B2 (en:Method)
FR (2) FR1509408A (en:Method)
GB (2) GB1137577A (en:Method)
NL (2) NL154062B (en:Method)
SE (1) SE326504B (en:Method)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5696402A (en) * 1965-09-28 1997-12-09 Li; Chou H. Integrated circuit device
US3440498A (en) * 1966-03-14 1969-04-22 Nat Semiconductor Corp Contacts for insulation isolated semiconductor integrated circuitry
US3471922A (en) * 1966-06-02 1969-10-14 Raytheon Co Monolithic integrated circuitry with dielectric isolated functional regions
US3575740A (en) * 1967-06-08 1971-04-20 Ibm Method of fabricating planar dielectric isolated integrated circuits
US3460007A (en) * 1967-07-03 1969-08-05 Rca Corp Semiconductor junction device
US3753803A (en) * 1968-12-06 1973-08-21 Hitachi Ltd Method of dividing semiconductor layer into a plurality of isolated regions
US3844858A (en) * 1968-12-31 1974-10-29 Texas Instruments Inc Process for controlling the thickness of a thin layer of semiconductor material and semiconductor substrate
US3755012A (en) * 1971-03-19 1973-08-28 Motorola Inc Controlled anisotropic etching process for fabricating dielectrically isolated field effect transistor
US3969749A (en) * 1974-04-01 1976-07-13 Texas Instruments Incorporated Substrate for dielectric isolated integrated circuit with V-etched depth grooves for lapping guide
US3928094A (en) * 1975-01-16 1975-12-23 Fairchild Camera Instr Co Method of aligning a wafer beneath a mask and system therefor and wafer having a unique alignment pattern
JPS5351970A (en) * 1976-10-21 1978-05-11 Toshiba Corp Manufacture for semiconductor substrate
US4502913A (en) * 1982-06-30 1985-03-05 International Business Machines Corporation Total dielectric isolation for integrated circuits
RU2146714C1 (ru) * 1998-12-22 2000-03-20 Центральный научно-исследовательский институт пленочных материалов и искусственной кожи Способ переработки кожевенных отходов в кожевенный порошок
US6927073B2 (en) * 2002-05-16 2005-08-09 Nova Research, Inc. Methods of fabricating magnetoresistive memory devices

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2967344A (en) * 1958-02-14 1961-01-10 Rca Corp Semiconductor devices
FR1217793A (fr) * 1958-12-09 1960-05-05 Perfectionnements à la fabrication des éléments semi-conducteurs
NL252131A (en:Method) * 1959-06-30
US3179543A (en) * 1961-03-30 1965-04-20 Philips Corp Method of manufacturing plates having funnel-shaped cavities or perforations obtained by etching
GB967002A (en) * 1961-05-05 1964-08-19 Standard Telephones Cables Ltd Improvements in or relating to semiconductor devices
US3290753A (en) * 1963-08-19 1966-12-13 Bell Telephone Labor Inc Method of making semiconductor integrated circuit elements

Also Published As

Publication number Publication date
DE1589920A1 (de) 1970-09-17
CH451325A (de) 1968-05-15
SE326504B (en:Method) 1970-07-27
DE1589918A1 (de) 1970-06-04
GB1096484A (en) 1967-12-29
BE691802A (en:Method) 1967-05-29
DE1589920B2 (de) 1971-02-18
DE1589918B2 (de) 1971-01-14
GB1137577A (en) 1968-12-27
US3357871A (en) 1967-12-12
NL154062B (nl) 1977-07-15
BE692869A (en:Method) 1967-07-03
US3419956A (en) 1969-01-07
FR1509408A (fr) 1968-01-12
CH451326A (de) 1968-05-15
NL6700219A (en:Method) 1967-07-13
FR1507802A (fr) 1967-12-29
NL154060B (nl) 1977-07-15

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Legal Events

Date Code Title Description
V1 Lapsed because of non-payment of the annual fee
NL80 Abbreviated name of patent owner mentioned of already nullified patent

Owner name: INTERNATIONAL