NL184083C - Halfgeleiderinrichting met een transistor waarvan het basisgebied aansluit aan een weerstandszone met hetzelfde geleidingstype. - Google Patents
Halfgeleiderinrichting met een transistor waarvan het basisgebied aansluit aan een weerstandszone met hetzelfde geleidingstype.Info
- Publication number
- NL184083C NL184083C NLAANVRAGE7812462,A NL7812462A NL184083C NL 184083 C NL184083 C NL 184083C NL 7812462 A NL7812462 A NL 7812462A NL 184083 C NL184083 C NL 184083C
- Authority
- NL
- Netherlands
- Prior art keywords
- semiconductor device
- conduction type
- base area
- whose base
- transistor whose
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0744—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
- H01L27/075—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. lateral bipolar transistor, and vertical bipolar transistor and resistor
- H01L27/0755—Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
- H01L27/0772—Vertical bipolar transistor in combination with resistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7739795A FR2413782A1 (fr) | 1977-12-30 | 1977-12-30 | Element de circuit integre destine aux memoires bipolaires a isolement lateral par oxyde |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| NL7812462A NL7812462A (nl) | 1979-07-03 |
| NL184083B NL184083B (nl) | 1988-11-01 |
| NL184083C true NL184083C (nl) | 1989-04-03 |
Family
ID=9199555
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NLAANVRAGE7812462,A NL184083C (nl) | 1977-12-30 | 1978-12-22 | Halfgeleiderinrichting met een transistor waarvan het basisgebied aansluit aan een weerstandszone met hetzelfde geleidingstype. |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US4255674A (nl) |
| JP (1) | JPS5497377A (nl) |
| AU (1) | AU4295378A (nl) |
| CA (1) | CA1132259A (nl) |
| DE (1) | DE2854994C2 (nl) |
| FR (1) | FR2413782A1 (nl) |
| GB (1) | GB2011714B (nl) |
| IT (1) | IT1100867B (nl) |
| NL (1) | NL184083C (nl) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL186934C (nl) * | 1979-09-11 | 1991-04-02 | Philips Nv | Statische bipolaire geheugencel. |
| EP0047488B1 (de) * | 1980-09-06 | 1985-08-21 | UTP Schweissmaterial GmbH & Co. KG | Rückzündsicheres Auftragsgerät |
| DE3035462A1 (de) * | 1980-09-19 | 1982-05-13 | Siemens AG, 1000 Berlin und 8000 München | Halbleiterelement |
| FR2494041B1 (fr) * | 1980-11-07 | 1987-01-23 | Radiotechnique Compelec | Element de circuit integre pour memoire bipolaire, son procede de realisation et cellule memoire realisee a l'aide dudit element |
| JPS57100755A (en) * | 1980-12-15 | 1982-06-23 | Fujitsu Ltd | Semiconductor device |
| US4624046A (en) * | 1982-01-04 | 1986-11-25 | Fairchild Camera & Instrument Corp. | Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM |
| JPS6097659A (ja) * | 1983-11-01 | 1985-05-31 | Matsushita Electronics Corp | 半導体集積回路 |
| US4812890A (en) * | 1985-11-19 | 1989-03-14 | Thompson-Csf Components Corporation | Bipolar microwave integratable transistor |
| FR2603146B1 (fr) * | 1986-08-19 | 1988-11-10 | Thomson Csf | Source de courant de type charge active et son procede de realisation |
| US4864539A (en) * | 1987-01-15 | 1989-09-05 | International Business Machines Corporation | Radiation hardened bipolar static RAM cell |
| JP3612089B2 (ja) * | 1994-03-22 | 2005-01-19 | 株式会社ルネサステクノロジ | バンドギャップ基準電源装置 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3648125A (en) * | 1971-02-02 | 1972-03-07 | Fairchild Camera Instr Co | Method of fabricating integrated circuits with oxidized isolation and the resulting structure |
| US3936813A (en) * | 1973-04-25 | 1976-02-03 | Intel Corporation | Bipolar memory cell employing inverted transistors and pinched base resistors |
| US4011580A (en) * | 1973-05-30 | 1977-03-08 | U.S. Philips Corporation | Integrated circuit |
| US3979612A (en) * | 1973-11-21 | 1976-09-07 | Raytheon Company | V-groove isolated integrated circuit memory with integral pinched resistors |
| US4035784A (en) * | 1975-12-22 | 1977-07-12 | Fairchild Camera And Instrument Corporation | Asymmetrical memory cell arrangement |
| US4149177A (en) * | 1976-09-03 | 1979-04-10 | Fairchild Camera And Instrument Corporation | Method of fabricating conductive buried regions in integrated circuits and the resulting structures |
| US4118728A (en) * | 1976-09-03 | 1978-10-03 | Fairchild Camera And Instrument Corporation | Integrated circuit structures utilizing conductive buried regions |
| JPS5397343A (en) * | 1977-02-07 | 1978-08-25 | Hitachi Ltd | Semiconductor memory cell |
-
1977
- 1977-12-30 FR FR7739795A patent/FR2413782A1/fr active Granted
-
1978
- 1978-12-20 DE DE2854994A patent/DE2854994C2/de not_active Expired
- 1978-12-21 CA CA318,355A patent/CA1132259A/en not_active Expired
- 1978-12-21 GB GB7849656A patent/GB2011714B/en not_active Expired
- 1978-12-22 NL NLAANVRAGE7812462,A patent/NL184083C/nl not_active IP Right Cessation
- 1978-12-27 IT IT31321/78A patent/IT1100867B/it active
- 1978-12-27 JP JP16027378A patent/JPS5497377A/ja active Granted
- 1978-12-28 AU AU42953/78A patent/AU4295378A/en active Pending
-
1979
- 1979-01-02 US US06/000,415 patent/US4255674A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| FR2413782A1 (fr) | 1979-07-27 |
| NL184083B (nl) | 1988-11-01 |
| IT7831321A0 (it) | 1978-12-27 |
| JPS5497377A (en) | 1979-08-01 |
| GB2011714B (en) | 1982-06-16 |
| FR2413782B1 (nl) | 1982-03-05 |
| GB2011714A (en) | 1979-07-11 |
| AU4295378A (en) | 1979-07-05 |
| DE2854994A1 (de) | 1979-07-05 |
| NL7812462A (nl) | 1979-07-03 |
| JPS64825B2 (nl) | 1989-01-09 |
| US4255674A (en) | 1981-03-10 |
| CA1132259A (en) | 1982-09-21 |
| IT1100867B (it) | 1985-09-28 |
| DE2854994C2 (de) | 1986-01-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A1B | A search report has been drawn up | ||
| BC | A request for examination has been filed | ||
| A85 | Still pending on 85-01-01 | ||
| V1 | Lapsed because of non-payment of the annual fee |