NL165861C - Informatie verwerkend stelsel met twee synchroon lopende informatie verwerkende inrichtingen. - Google Patents

Informatie verwerkend stelsel met twee synchroon lopende informatie verwerkende inrichtingen.

Info

Publication number
NL165861C
NL165861C NL7018530A NL7018530A NL165861C NL 165861 C NL165861 C NL 165861C NL 7018530 A NL7018530 A NL 7018530A NL 7018530 A NL7018530 A NL 7018530A NL 165861 C NL165861 C NL 165861C
Authority
NL
Netherlands
Prior art keywords
information processing
synchronous
ongoing
processing system
processing devices
Prior art date
Application number
NL7018530A
Other languages
English (en)
Dutch (nl)
Other versions
NL7018530A (de
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of NL7018530A publication Critical patent/NL7018530A/xx
Application granted granted Critical
Publication of NL165861C publication Critical patent/NL165861C/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G06F11/1645—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components and the comparison itself uses redundant hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1633—Error detection by comparing the output of redundant processing systems using mutual exchange of the output between the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/54558—Redundancy, stand-by
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Software Systems (AREA)
  • Hardware Redundancy (AREA)
  • Exchange Systems With Centralized Control (AREA)
NL7018530A 1969-12-29 1970-12-18 Informatie verwerkend stelsel met twee synchroon lopende informatie verwerkende inrichtingen. NL165861C (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691965314 DE1965314C3 (de) 1969-12-29 1969-12-29 Verfahren zum Betrieb einer Datenverarbeitungsanordnung mit zwei Datenverarbeitungsanlagen

Publications (2)

Publication Number Publication Date
NL7018530A NL7018530A (de) 1971-07-01
NL165861C true NL165861C (nl) 1981-05-15

Family

ID=5755217

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7018530A NL165861C (nl) 1969-12-29 1970-12-18 Informatie verwerkend stelsel met twee synchroon lopende informatie verwerkende inrichtingen.

Country Status (8)

Country Link
AT (1) AT304652B (de)
BE (1) BE760976A (de)
CH (1) CH521635A (de)
DE (1) DE1965314C3 (de)
FR (1) FR2074209A5 (de)
GB (1) GB1284506A (de)
LU (1) LU62319A1 (de)
NL (1) NL165861C (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2236718C3 (de) * 1972-07-26 1978-06-29 Siemens Ag, 1000 Berlin Und 8000 Muenchen Arbeitsverfahren für eine programmgesteuerte Datenverarbeitungs-, insbesondere Datenvermittlungsanlage
DE2733921C3 (de) * 1977-07-27 1981-03-26 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung für eine indirekt gesteuerte Vermittlungsanlage, insbesondere Fernsprechvermittlungsanlage
DE2826063A1 (de) * 1978-06-14 1979-12-20 Siemens Ag Indirekt gesteuerte vermittlungsanlage mit zeitkanalverbindungswegen, insbesondere fernsprechvermittlungsanlage
IT8003501A0 (it) * 1980-09-05 1980-09-05 Sits Soc It Telecom Siemens Comando centrale di una pluralita'di utenze periferiche
IT8003502A0 (it) * 1980-09-05 1980-09-05 Sits Soc It Telecom Siemens Unita' di sorveglianza del comando centrale di una pluralita' di utenze periferiche
IT1213344B (it) * 1986-09-17 1989-12-20 Honoywell Information Systems Architettura di calcolatore a tolleranza di guasto.
US4959836A (en) * 1987-12-09 1990-09-25 Siemens Transmission Systems, Inc. Register robustness improvement circuit and method
GB2313185B (en) * 1996-05-15 1999-11-10 British Gas Plc Radiators
US7565586B2 (en) 2006-05-25 2009-07-21 Honeywell International Inc. Method and apparatus for latent fault memory scrub in memory intensive computer hardware

Also Published As

Publication number Publication date
AT304652B (de) 1973-01-25
DE1965314C3 (de) 1974-10-17
GB1284506A (en) 1972-08-09
DE1965314B2 (de) 1974-03-21
NL7018530A (de) 1971-07-01
BE760976A (fr) 1971-06-29
LU62319A1 (de) 1971-05-18
DE1965314A1 (de) 1971-07-08
FR2074209A5 (de) 1971-10-01
CH521635A (de) 1972-04-15

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Legal Events

Date Code Title Description
V1 Lapsed because of non-payment of the annual fee