MY192355A - Lead frame and manufacturing method thereof, and semiconductor package - Google Patents

Lead frame and manufacturing method thereof, and semiconductor package

Info

Publication number
MY192355A
MY192355A MYPI2017700493A MYPI2017700493A MY192355A MY 192355 A MY192355 A MY 192355A MY PI2017700493 A MYPI2017700493 A MY PI2017700493A MY PI2017700493 A MYPI2017700493 A MY PI2017700493A MY 192355 A MY192355 A MY 192355A
Authority
MY
Malaysia
Prior art keywords
lead frame
manufacturing
semiconductor package
pad
smooth surface
Prior art date
Application number
MYPI2017700493A
Inventor
Ishibashi Takahiro
Original Assignee
Mitsui High Tec
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui High Tec filed Critical Mitsui High Tec
Publication of MY192355A publication Critical patent/MY192355A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
    • H01L23/49524—Additional leads the additional leads being a tape carrier or flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

To provide a lead frame (100) including a pad (10), leads (12) arranged around the pad (10), and support bars (14) supporting the pad (10), wherein the support bars (14) and the leads (12) each have a rough surface (32) and a smooth surface (30), the smooth surface (30) of the support bar (14) on a side of one main face (100a) is closer to the pad (10) than the smooth surface (30) of the lead (12). (Fig. 1)
MYPI2017700493A 2016-02-17 2017-02-15 Lead frame and manufacturing method thereof, and semiconductor package MY192355A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016028068A JP6621681B2 (en) 2016-02-17 2016-02-17 Lead frame, manufacturing method thereof, and semiconductor package

Publications (1)

Publication Number Publication Date
MY192355A true MY192355A (en) 2022-08-17

Family

ID=59648783

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2017700493A MY192355A (en) 2016-02-17 2017-02-15 Lead frame and manufacturing method thereof, and semiconductor package

Country Status (4)

Country Link
JP (1) JP6621681B2 (en)
CN (1) CN107093594B (en)
MY (1) MY192355A (en)
TW (1) TWI642146B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7016677B2 (en) * 2017-11-21 2022-02-07 新光電気工業株式会社 Manufacturing method of lead frame, semiconductor device, lead frame
JP6736716B1 (en) * 2019-03-22 2020-08-05 大口マテリアル株式会社 Lead frame
JP6741356B1 (en) * 2019-03-22 2020-08-19 大口マテリアル株式会社 Lead frame

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03295262A (en) * 1990-04-13 1991-12-26 Mitsubishi Electric Corp Lead frame and manufacture thereof
JP2000243889A (en) * 1999-02-22 2000-09-08 Sony Corp Lead frame for semiconductor device and method and device for working its shape
JP3314754B2 (en) * 1999-04-22 2002-08-12 松下電器産業株式会社 Semiconductor device having lead-free tin-based solder film and method of manufacturing the same
JP3841768B2 (en) * 2003-05-22 2006-11-01 新光電気工業株式会社 Package parts and semiconductor packages
US7049683B1 (en) * 2003-07-19 2006-05-23 Ns Electronics Bangkok (1993) Ltd. Semiconductor package including organo-metallic coating formed on surface of leadframe roughened using chemical etchant to prevent separation between leadframe and molding compound
US7838339B2 (en) * 2008-04-04 2010-11-23 Gem Services, Inc. Semiconductor device package having features formed by stamping
KR101113891B1 (en) * 2009-10-01 2012-02-29 삼성테크윈 주식회사 Lead frame and method of manufacturing lead frame
JP5669495B2 (en) * 2010-09-17 2015-02-12 株式会社大貫工業所 Resin-encapsulated metal component, lead frame used therefor, and method of manufacturing metal component
JP2014007363A (en) * 2012-06-27 2014-01-16 Renesas Electronics Corp Method of manufacturing semiconductor device and semiconductor device
JP2014093452A (en) * 2012-11-05 2014-05-19 Hitachi Cable Ltd Punching die, lead frame, and method of manufacturing lead frame
JP6093646B2 (en) * 2013-05-14 2017-03-08 新光電気工業株式会社 Manufacturing method of plating film

Also Published As

Publication number Publication date
CN107093594A (en) 2017-08-25
JP2017147332A (en) 2017-08-24
TWI642146B (en) 2018-11-21
CN107093594B (en) 2019-05-03
JP6621681B2 (en) 2019-12-18
TW201742197A (en) 2017-12-01

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