MY122555A - Chrominance signal processing circuit - Google Patents

Chrominance signal processing circuit

Info

Publication number
MY122555A
MY122555A MYPI94001710A MYPI9401710A MY122555A MY 122555 A MY122555 A MY 122555A MY PI94001710 A MYPI94001710 A MY PI94001710A MY PI9401710 A MYPI9401710 A MY PI9401710A MY 122555 A MY122555 A MY 122555A
Authority
MY
Malaysia
Prior art keywords
signal
phase
chrominance
chrominance signal
automatic
Prior art date
Application number
MYPI94001710A
Other languages
English (en)
Inventor
Shinichirou Miyazaki
Kazuo Watanabe
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of MY122555A publication Critical patent/MY122555A/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/44—Colour synchronisation
    • H04N9/455—Generation of colour burst signals; Insertion of colour burst signals in colour picture signals or separation of colour burst signals from colour picture signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/64—Circuits for processing colour signals
    • H04N9/68—Circuits for processing colour signals for controlling the amplitude of colour signals, e.g. automatic chroma control circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)
MYPI94001710A 1993-07-01 1994-06-30 Chrominance signal processing circuit MY122555A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16343293A JP3523890B2 (ja) 1993-07-01 1993-07-01 クロマ信号復調回路

Publications (1)

Publication Number Publication Date
MY122555A true MY122555A (en) 2006-04-29

Family

ID=15773786

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI94001710A MY122555A (en) 1993-07-01 1994-06-30 Chrominance signal processing circuit

Country Status (8)

Country Link
US (1) US5532757A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0632664B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JP3523890B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR100320881B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
CN (1) CN1075325C (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE69413608T2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
MY (1) MY122555A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
TW (1) TW241435B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001095005A (ja) * 1999-09-20 2001-04-06 Matsushita Electric Ind Co Ltd クロック発生回路
US7143207B2 (en) * 2003-11-14 2006-11-28 Intel Corporation Data accumulation between data path having redrive circuit and memory device
US7345708B2 (en) * 2003-12-23 2008-03-18 Lsi Logic Corporation Method and apparatus for video deinterlacing and format conversion
JP2008294629A (ja) * 2007-05-23 2008-12-04 Funai Electric Co Ltd テレビ受信機
CN101448074B (zh) * 2007-11-26 2010-08-11 晨星半导体股份有限公司 多切割的水平同步讯号的产生装置与方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4291332A (en) * 1980-04-10 1981-09-22 Tokyo Shibaura Denki Kabushiki Kaisha Phase-locked circuit
DE3136522A1 (de) * 1981-09-15 1983-03-24 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zur digitalen regelung der phase des systemtaktes eines digitalen signalverarbeitungssystems
EP0095543B1 (de) * 1982-05-27 1985-09-25 Deutsche ITT Industries GmbH Integrierte digitale Chrominanzkanal-Schaltung mit Verstärkungsregelung
US4466015A (en) * 1982-09-30 1984-08-14 Rca Corporation Automatic color burst magnitude control for a digital television receiver
US4543600A (en) * 1983-09-19 1985-09-24 Rca Corporation Digital signal phase measuring apparatus as for a phase-locked loop
US4573069A (en) * 1984-03-29 1986-02-25 Rca Corporation Chrominance fine gain control in a digital television receiver
DE3438564A1 (de) * 1984-10-20 1986-04-30 Philips Patentverwaltung Gmbh, 2000 Hamburg Abtastregelkreis
US4635103A (en) * 1984-12-03 1987-01-06 Rca Corporation Phase locked loop system incorporating automatic gain control
EP0202015B1 (en) * 1985-04-12 1992-08-19 Tektronix, Inc. Digital phase-locked loops
DE3572288D1 (en) * 1985-12-19 1989-09-14 Itt Ind Gmbh Deutsche Chrominance control circuit for a digital television receiver
US4797730A (en) * 1987-04-10 1989-01-10 Ampex Corporation Method and apparatus for controlling the sampling phase of an analog color television signal
EP0575419A1 (de) * 1990-05-01 1993-12-29 Deutsche Thomson-Brandt Gmbh Schaltung zum erzeugen eines farbträgers aus dem farbsynchronsignal
GB9013151D0 (en) * 1990-06-13 1990-08-01 Questech Ltd Digital signal processing system
GB9122711D0 (en) * 1991-10-25 1991-12-11 Alpha Image Ltd Digitally phase locking analogue signals

Also Published As

Publication number Publication date
EP0632664A3 (en) 1995-01-18
JP3523890B2 (ja) 2004-04-26
DE69413608T2 (de) 1999-03-11
KR100320881B1 (ko) 2002-06-20
KR950005058A (ko) 1995-02-18
JPH0723407A (ja) 1995-01-24
US5532757A (en) 1996-07-02
TW241435B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1995-02-21
EP0632664B1 (en) 1998-09-30
DE69413608D1 (de) 1998-11-05
CN1075325C (zh) 2001-11-21
EP0632664A2 (en) 1995-01-04
CN1124435A (zh) 1996-06-12

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