MY104531A - Data processing system with instruction tag apparatus - Google Patents
Data processing system with instruction tag apparatusInfo
- Publication number
- MY104531A MY104531A MYPI90002044A MYPI19902044A MY104531A MY 104531 A MY104531 A MY 104531A MY PI90002044 A MYPI90002044 A MY PI90002044A MY PI19902044 A MYPI19902044 A MY PI19902044A MY 104531 A MY104531 A MY 104531A
- Authority
- MY
- Malaysia
- Prior art keywords
- instruction
- type
- instructions
- circuit
- execution
- Prior art date
Links
- 230000004044 response Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
- G06F9/3889—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
Abstract
A DATA PROCESSING SYSTEM HAVING AN INSTRUCTION EXECUTION CIRCUIT THAT EXECUTES A FIRST TYPE OF INSTRUTION.ALSO INCLUDED IS A FETCH CIRCUIT THAT FETCHES INSTRUCTIONS FROM A MEMORY AND FETCHES DATA FROM THE MEMORY IN RESPONSE TO A SECOND TYPE OF INSTRUCTION. AN INSTRUCTION DECODER IS INCLUDED THAT DECODES FETCHES INSTRUCTIONS AND DISPATCHES INSTRUCTIONS OF THE FIRST TYPE TO AN INSTRUCTION QUEUEING CIRCUIT. THE INSTRUCTION DECODER FURTHER DISPATCHES INSTRUCTIONS OF THE SECOND TYPE TO THE FETCHING CIRCUIT. THE INSTRUCTION QUEUEING CIRCUIT INCLUDES THE CAPABILITY TO STORE DECODED INSTRUCTION OF THE FIRST TYPE WHILE TAGGING THESE INSTRUCTION WHEN DATA REQUIRED FOR THE EXECUTION OF THESE INSTRUCTIONS HAS NOT BEEN FETCHED.THE INSTRUCTION QUEUEING CIRCUIT FURTHER CLEARS THESE TAGS OF THESE INSTRUCTIONS OF THE FIRST TYPE WHEN DATA THAT IS REQUIRED FOR THE EXECUTION HAS BEEN FETCHED. THE INSTRUCTION QUEUEING CIRCUIT SERIALLY PROVIDES THE UNTAGGED INSTRUCTIONS OF THE FIRST TYPE TO THE INSTRUCTION EXECUTION CIRCUIT.(FIG. 3)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/453,529 US5150470A (en) | 1989-12-20 | 1989-12-20 | Data processing system with instruction queue having tags indicating outstanding data status |
Publications (1)
Publication Number | Publication Date |
---|---|
MY104531A true MY104531A (en) | 1994-04-30 |
Family
ID=23800914
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MYPI90002044A MY104531A (en) | 1989-12-20 | 1990-11-20 | Data processing system with instruction tag apparatus |
Country Status (10)
Country | Link |
---|---|
US (1) | US5150470A (en) |
EP (1) | EP0437044B1 (en) |
JP (1) | JP2701179B2 (en) |
KR (1) | KR930008035B1 (en) |
CN (1) | CN1021144C (en) |
AU (1) | AU639953B2 (en) |
DE (1) | DE69017178T2 (en) |
HK (1) | HK90795A (en) |
MY (1) | MY104531A (en) |
NZ (1) | NZ236142A (en) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2507638B2 (en) * | 1989-12-01 | 1996-06-12 | 三菱電機株式会社 | Data processing device |
US5255371A (en) * | 1990-04-02 | 1993-10-19 | Unisys Corporation | Apparatus for interfacing a real-time communication link to an asynchronous digital computer system by utilizing grouped data transfer commands |
JP2834292B2 (en) * | 1990-08-15 | 1998-12-09 | 株式会社日立製作所 | Data processor |
US5363495A (en) * | 1991-08-26 | 1994-11-08 | International Business Machines Corporation | Data processing system with multiple execution units capable of executing instructions out of sequence |
US5371684A (en) | 1992-03-31 | 1994-12-06 | Seiko Epson Corporation | Semiconductor floor plan for a register renaming circuit |
JP2549256B2 (en) * | 1992-12-01 | 1996-10-30 | インターナショナル・ビジネス・マシーンズ・コーポレイション | Method and apparatus for transferring data to a floating point processor |
US5761473A (en) * | 1993-01-08 | 1998-06-02 | International Business Machines Corporation | Method and system for increased instruction synchronization efficiency in a superscalar processsor system utilizing partial data dependency interlocking |
US5434987A (en) * | 1993-09-21 | 1995-07-18 | Intel Corporation | Method and apparatus for preventing incorrect fetching of an instruction of a self-modifying code sequence with dependency on a bufered store |
WO1995016955A1 (en) * | 1993-12-15 | 1995-06-22 | Silicon Graphics, Inc. | Load latency of zero for floating point load instructions using a load data queue |
US5734856A (en) * | 1994-04-05 | 1998-03-31 | Seiko Epson Corporation | System and method for generating supplemental ready signals to eliminate wasted cycles between operations |
US5758176A (en) * | 1994-09-28 | 1998-05-26 | International Business Machines Corporation | Method and system for providing a single-instruction, multiple-data execution unit for performing single-instruction, multiple-data operations within a superscalar data processing system |
CN1069983C (en) * | 1994-10-13 | 2001-08-22 | 联华电子股份有限公司 | Virtual line-up device |
US5745726A (en) * | 1995-03-03 | 1998-04-28 | Fujitsu, Ltd | Method and apparatus for selecting the oldest queued instructions without data dependencies |
US5751983A (en) * | 1995-10-03 | 1998-05-12 | Abramson; Jeffrey M. | Out-of-order processor with a memory subsystem which handles speculatively dispatched load operations |
US5799165A (en) * | 1996-01-26 | 1998-08-25 | Advanced Micro Devices, Inc. | Out-of-order processing that removes an issued operation from an execution pipeline upon determining that the operation would cause a lengthy pipeline delay |
US5796997A (en) * | 1996-05-15 | 1998-08-18 | Hewlett-Packard Company | Fast nullify system and method for transforming a nullify function into a select function |
US5920710A (en) * | 1996-11-18 | 1999-07-06 | Advanced Micro Devices, Inc. | Apparatus and method for modifying status bits in a reorder buffer with a large speculative state |
US5878242A (en) * | 1997-04-21 | 1999-03-02 | International Business Machines Corporation | Method and system for forwarding instructions in a processor with increased forwarding probability |
US5941983A (en) * | 1997-06-24 | 1999-08-24 | Hewlett-Packard Company | Out-of-order execution using encoded dependencies between instructions in queues to determine stall values that control issurance of instructions from the queues |
US5958047A (en) * | 1997-06-25 | 1999-09-28 | Sun Microsystems, Inc. | Method for precise architectural update in an out-of-order processor |
US5958041A (en) * | 1997-06-26 | 1999-09-28 | Sun Microsystems, Inc. | Latency prediction in a pipelined microarchitecture |
US6032249A (en) * | 1998-02-02 | 2000-02-29 | International Business Machines Corporation | Method and system for executing a serializing instruction while bypassing a floating point unit pipeline |
US7287147B1 (en) | 2000-12-29 | 2007-10-23 | Mips Technologies, Inc. | Configurable co-processor interface |
US7237090B1 (en) | 2000-12-29 | 2007-06-26 | Mips Technologies, Inc. | Configurable out-of-order data transfer in a coprocessor interface |
US7178133B1 (en) | 2001-04-30 | 2007-02-13 | Mips Technologies, Inc. | Trace control based on a characteristic of a processor's operating state |
US7124072B1 (en) | 2001-04-30 | 2006-10-17 | Mips Technologies, Inc. | Program counter and data tracing from a multi-issue processor |
US7134116B1 (en) | 2001-04-30 | 2006-11-07 | Mips Technologies, Inc. | External trace synchronization via periodic sampling |
US7168066B1 (en) * | 2001-04-30 | 2007-01-23 | Mips Technologies, Inc. | Tracing out-of order load data |
US7185234B1 (en) | 2001-04-30 | 2007-02-27 | Mips Technologies, Inc. | Trace control from hardware and software |
US7181728B1 (en) | 2001-04-30 | 2007-02-20 | Mips Technologies, Inc. | User controlled trace records |
US7069544B1 (en) | 2001-04-30 | 2006-06-27 | Mips Technologies, Inc. | Dynamic selection of a compression algorithm for trace data |
US7065675B1 (en) | 2001-05-08 | 2006-06-20 | Mips Technologies, Inc. | System and method for speeding up EJTAG block data transfers |
US7043668B1 (en) | 2001-06-29 | 2006-05-09 | Mips Technologies, Inc. | Optimized external trace formats |
US7231551B1 (en) | 2001-06-29 | 2007-06-12 | Mips Technologies, Inc. | Distributed tap controller |
US7159101B1 (en) | 2003-05-28 | 2007-01-02 | Mips Technologies, Inc. | System and method to trace high performance multi-issue processors |
DE102004004307A1 (en) * | 2004-01-28 | 2005-09-01 | Infineon Technologies Ag | Circuit arrangement for control of command sequences to a circuit unit, e.g. a memory circuit, has additional access control arrangement for checking command authorization and temporal command allocation |
US20110004718A1 (en) * | 2009-07-02 | 2011-01-06 | Ross John Stenfort | System, method, and computer program product for ordering a plurality of write commands associated with a storage device |
US20120117335A1 (en) * | 2010-11-10 | 2012-05-10 | Advanced Micro Devices, Inc. | Load ordering queue |
US9519944B2 (en) * | 2014-09-02 | 2016-12-13 | Apple Inc. | Pipeline dependency resolution |
GB2564144B (en) * | 2017-07-05 | 2020-01-08 | Advanced Risc Mach Ltd | Context data management |
GB2572954B (en) * | 2018-04-16 | 2020-12-30 | Advanced Risc Mach Ltd | An apparatus and method for prefetching data items |
CN111290786B (en) * | 2018-12-12 | 2022-05-06 | 展讯通信(上海)有限公司 | Information processing method, device and storage medium |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3718912A (en) * | 1970-12-22 | 1973-02-27 | Ibm | Instruction execution unit |
US4179736A (en) * | 1977-11-22 | 1979-12-18 | Honeywell Information Systems Inc. | Microprogrammed computer control unit capable of efficiently executing a large repertoire of instructions for a high performance data processing unit |
JPS58151655A (en) * | 1982-03-03 | 1983-09-08 | Fujitsu Ltd | Information processing device |
JP2564805B2 (en) * | 1985-08-08 | 1996-12-18 | 日本電気株式会社 | Information processing device |
US4972317A (en) * | 1986-10-06 | 1990-11-20 | International Business Machines Corp. | Microprocessor implemented data processing system capable of emulating execution of special instructions not within the established microprocessor instruction set by switching access from a main store portion of a memory |
US5001624A (en) * | 1987-02-13 | 1991-03-19 | Harrell Hoffman | Processor controlled DMA controller for transferring instruction and data from memory to coprocessor |
US5045992A (en) * | 1988-10-19 | 1991-09-03 | Hewlett-Packard Company | Apparatus for executing instruction regardless of data types and thereafter selectively branching to other instruction upon determining of incompatible data type |
US4999802A (en) * | 1989-01-13 | 1991-03-12 | International Business Machines Corporation | Floating point arithmetic two cycle data flow |
-
1989
- 1989-12-20 US US07/453,529 patent/US5150470A/en not_active Expired - Fee Related
-
1990
- 1990-10-19 JP JP2279510A patent/JP2701179B2/en not_active Expired - Lifetime
- 1990-11-17 CN CN90109188A patent/CN1021144C/en not_active Expired - Fee Related
- 1990-11-20 AU AU66753/90A patent/AU639953B2/en not_active Ceased
- 1990-11-20 NZ NZ236142A patent/NZ236142A/en unknown
- 1990-11-20 MY MYPI90002044A patent/MY104531A/en unknown
- 1990-12-07 EP EP90313353A patent/EP0437044B1/en not_active Expired - Lifetime
- 1990-12-07 DE DE69017178T patent/DE69017178T2/en not_active Expired - Fee Related
- 1990-12-08 KR KR9020196A patent/KR930008035B1/en not_active IP Right Cessation
-
1995
- 1995-06-08 HK HK90795A patent/HK90795A/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR930008035B1 (en) | 1993-08-25 |
CN1052740A (en) | 1991-07-03 |
KR910012913A (en) | 1991-08-08 |
EP0437044A2 (en) | 1991-07-17 |
EP0437044A3 (en) | 1992-11-04 |
AU639953B2 (en) | 1993-08-12 |
DE69017178D1 (en) | 1995-03-30 |
HK90795A (en) | 1995-06-16 |
US5150470A (en) | 1992-09-22 |
JPH03191461A (en) | 1991-08-21 |
NZ236142A (en) | 1992-12-23 |
DE69017178T2 (en) | 1995-08-10 |
CN1021144C (en) | 1993-06-09 |
EP0437044B1 (en) | 1995-02-22 |
AU6675390A (en) | 1991-06-27 |
JP2701179B2 (en) | 1998-01-21 |
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