MXPA04004860A - Aparato de procesamiento de informacion y metodo, programa y medio de grabacion. - Google Patents
Aparato de procesamiento de informacion y metodo, programa y medio de grabacion.Info
- Publication number
- MXPA04004860A MXPA04004860A MXPA04004860A MXPA04004860A MX PA04004860 A MXPA04004860 A MX PA04004860A MX PA04004860 A MXPA04004860 A MX PA04004860A MX PA04004860 A MXPA04004860 A MX PA04004860A
- Authority
- MX
- Mexico
- Prior art keywords
- recording medium
- video
- program
- information processing
- processing device
- Prior art date
Links
- 230000010365 information processing Effects 0.000 title 1
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 230000000750 progressive effect Effects 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L65/00—Network arrangements, protocols or services for supporting real-time applications in data packet communication
- H04L65/10—Architectures or entities
- H04L65/102—Gateways
- H04L65/1043—Gateway controllers, e.g. media gateway control protocol [MGCP] controllers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/91—Television signal processing therefor
- H04N5/92—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/1613—Constructional details or arrangements for portable computers
- G06F1/1626—Constructional details or arrangements for portable computers with a single-body enclosure integrating a flat display, e.g. Personal Digital Assistants [PDAs]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/1613—Constructional details or arrangements for portable computers
- G06F1/1633—Constructional details or arrangements of portable computers not specific to the type of enclosures covered by groups G06F1/1615 - G06F1/1626
- G06F1/1637—Details related to the display arrangement, including those related to the mounting of the display in the housing
- G06F1/1639—Details related to the display arrangement, including those related to the mounting of the display in the housing the display being based on projection
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/30—Authentication, i.e. establishing the identity or authorisation of security principals
- G06F21/305—Authentication, i.e. establishing the identity or authorisation of security principals by remotely controlling device operation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/62—Protecting access to data via a platform, e.g. using keys or access control rules
- G06F21/6209—Protecting access to data via a platform, e.g. using keys or access control rules to a single file or object, e.g. in a secure envelope, encrypted and accessed using a key, or with access control rules appended to the object itself
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
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- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
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- G—PHYSICS
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- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
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- G06F21/88—Detecting or preventing theft or loss
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
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- G—PHYSICS
- G11—INFORMATION STORAGE
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- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10305—Improvement or modification of read or write signals signal quality assessment
- G11B20/10398—Improvement or modification of read or write signals signal quality assessment jitter, timing deviations or phase and frequency errors
- G11B20/10425—Improvement or modification of read or write signals signal quality assessment jitter, timing deviations or phase and frequency errors by counting out-of-lock events of a PLL
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- H—ELECTRICITY
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- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
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- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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- H04L1/0066—Parallel concatenated codes
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- H04L12/4641—Virtual LANs, VLANs, e.g. virtual private networks [VPN]
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- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
- H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
- H04L25/03038—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a non-recursive structure
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- H04L25/4902—Pulse width modulation; Pulse position modulation
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- H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes
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- H04L25/497—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems by correlative coding, e.g. partial response coding or echo modulation coding transmitters and receivers for partial response systems
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Abstract
Una corriente de bits de video codificada que tiene una velocidad cuadros de 24 Hz o 23.976 Hz y un formato progresivo tanto para NTSC como PAL, se graba en un medio de grabacion. Una corriente codificada reproducida del medio de grabacion se suministra a un descodificador 20. En el descodificador 20, la corriente codificada se descodifica y se obtiene video de 24 p o 23.976 p. Una porcion de conversion de video 25 convierte el video reproducido en un video de exhibicion de acuerdo con el formato de exhibicion de un monitor 26. Para el rango NTSC, puede utilizarse un formato de exhibicion de 29.97i o 59.94p. Para el rango PAL puede utilizarse un formato de exhibicion 25i o 50p.
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MXPA04004860 MXPA04004860A (es) | 2002-10-01 | 2004-05-21 | Aparato de procesamiento de informacion y metodo, programa y medio de grabacion. |
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JP4366277B2 (ja) * | 2004-09-21 | 2009-11-18 | キヤノン株式会社 | 撮像装置及びその制御方法 |
WO2006082150A2 (en) * | 2005-02-07 | 2006-08-10 | Thomson Licensing | METHOD AND APPARATUS FOR REPLAYING A VIDEO SIGNAL AND ONE OR MORE AUDIO SIGNALS RELATED TO AUDIO/VIDEO DATA THAT ARE BASED ON A 24Hz FRAME FREQUENCY VIDEO SIGNAL |
EP1720166A1 (en) * | 2005-05-04 | 2006-11-08 | Deutsche Thomson-Brandt Gmbh | Method and apparatus for authoring a 24p audio/video data stream by supplementing it with additional 50i format data items |
JP4251298B2 (ja) * | 2005-07-15 | 2009-04-08 | ソニー株式会社 | 再生装置および再生方法、プログラム、プログラム格納媒体、データ、記録媒体、記録装置、および、記録媒体の製造方法 |
US20070025963A1 (en) * | 2005-07-27 | 2007-02-01 | Chih-Ping Liu | Methods for reduction of scar tissue formation |
JP2007134944A (ja) * | 2005-11-10 | 2007-05-31 | Funai Electric Co Ltd | 映像信号出力装置 |
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JP5020025B2 (ja) * | 2007-10-17 | 2012-09-05 | 三菱電機株式会社 | 電子透かし検出装置、その方法およびそのプログラム |
JPWO2012023282A1 (ja) * | 2010-08-20 | 2013-10-28 | パナソニック株式会社 | 動画像送信装置とその方法、動画像受信装置とその方法、及び動画像送受信装置 |
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JP2000092458A (ja) * | 1998-09-17 | 2000-03-31 | Toshiba Corp | 映像信号再生装置 |
WO2000024197A1 (fr) * | 1998-10-21 | 2000-04-27 | Sony Corporation | Dispositif et procede de traitement de donnees, dispositif et procede d'enregistrement |
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JP2001218172A (ja) * | 2000-01-31 | 2001-08-10 | Nec Corp | 動画像復号器におけるフレームレート変換装置、フレームレート変換方法、およびその記録媒体、集積回路装置 |
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WO2002039737A1 (fr) * | 2000-11-07 | 2002-05-16 | Matsushita Electric Industrial Co., Ltd. | Systeme de production d'un signal video avec dispositif d'enregistrement/reproduction de signal video integre |
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JP3749147B2 (ja) * | 2001-07-27 | 2006-02-22 | シャープ株式会社 | 表示装置 |
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- 2003-09-17 CN CNB038016591A patent/CN100466711C/zh not_active Expired - Fee Related
- 2003-09-17 US US10/494,048 patent/US7596297B2/en not_active Expired - Fee Related
- 2003-09-17 AU AU2003264457A patent/AU2003264457A1/en not_active Abandoned
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KR20050056162A (ko) | 2005-06-14 |
JP4543926B2 (ja) | 2010-09-15 |
KR101007838B1 (ko) | 2011-01-13 |
CN1596543A (zh) | 2005-03-16 |
EP1447981A4 (en) | 2010-10-20 |
CN100466711C (zh) | 2009-03-04 |
US7596297B2 (en) | 2009-09-29 |
WO2004032494A1 (ja) | 2004-04-15 |
JPWO2004032494A1 (ja) | 2006-02-02 |
US20050078942A1 (en) | 2005-04-14 |
EP1447981A1 (en) | 2004-08-18 |
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