MX9804240A - Manejadores de integrados para pantallas planas que emplean elementos logicos de calcogenidos. - Google Patents

Manejadores de integrados para pantallas planas que emplean elementos logicos de calcogenidos.

Info

Publication number
MX9804240A
MX9804240A MX9804240A MX9804240A MX9804240A MX 9804240 A MX9804240 A MX 9804240A MX 9804240 A MX9804240 A MX 9804240A MX 9804240 A MX9804240 A MX 9804240A MX 9804240 A MX9804240 A MX 9804240A
Authority
MX
Mexico
Prior art keywords
flat panel
panel displays
logic elements
logic gate
ots3
Prior art date
Application number
MX9804240A
Other languages
English (en)
Inventor
Stanford R Ovshinsky
Guy C Wicker
Original Assignee
Energy Conversion Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Energy Conversion Devices Inc filed Critical Energy Conversion Devices Inc
Publication of MX9804240A publication Critical patent/MX9804240A/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/23—Majority or minority circuits, i.e. giving output having the state of the majority or the minority of the inputs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/76—Simultaneous conversion using switching tree
    • H03M1/765—Simultaneous conversion using switching tree using a single level of switches which are controlled by unary decoded digital signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/20—Conversion to or from representation by pulses the pulses having more than three levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

La presente invencion define una familia de circuitería logica que comprende cuando menos una compuerta logica. Cada compuerta logica comprende una pluralidad de conmutadores de umbral calcogenidos ( OTS1, OTS2, OTS3). Las compuertas logicas de la presente invencion usan un conmutador de umbral calcogenido (OTS3) como un medio de descargar la capacitancia de carga y reponer o reajustar la salida de la compuerta logica. La presente invencion también define un manejador de pantalla para impulsar una pantalla de panel plana que tenga líneas de impulsion en filas y columnas. El manejador de pantalla comprende compuerta logicas en donde cada compuerta logica consiste de interruptores de umbral de calcogenidos.
MX9804240A 1995-11-28 1998-05-27 Manejadores de integrados para pantallas planas que emplean elementos logicos de calcogenidos. MX9804240A (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/565,187 US5694054A (en) 1995-11-28 1995-11-28 Integrated drivers for flat panel displays employing chalcogenide logic elements

Publications (1)

Publication Number Publication Date
MX9804240A true MX9804240A (es) 1998-09-30

Family

ID=24257554

Family Applications (1)

Application Number Title Priority Date Filing Date
MX9804240A MX9804240A (es) 1995-11-28 1998-05-27 Manejadores de integrados para pantallas planas que emplean elementos logicos de calcogenidos.

Country Status (10)

Country Link
US (1) US5694054A (es)
EP (1) EP0864204B1 (es)
JP (1) JP2000501265A (es)
KR (1) KR100354782B1 (es)
AU (1) AU1141797A (es)
CA (1) CA2236119C (es)
DE (1) DE69630139T2 (es)
MX (1) MX9804240A (es)
UA (1) UA46076C2 (es)
WO (1) WO1997020391A1 (es)

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Also Published As

Publication number Publication date
CA2236119C (en) 2004-05-11
DE69630139D1 (de) 2003-10-30
AU1141797A (en) 1997-06-19
EP0864204A4 (en) 1999-09-08
WO1997020391A1 (en) 1997-06-05
KR100354782B1 (ko) 2002-11-18
DE69630139T2 (de) 2004-07-22
US5694054A (en) 1997-12-02
UA46076C2 (uk) 2002-05-15
KR19990071709A (ko) 1999-09-27
CA2236119A1 (en) 1997-06-05
EP0864204A1 (en) 1998-09-16
JP2000501265A (ja) 2000-02-02
EP0864204B1 (en) 2003-09-24

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